74ACT16863DL ,18-Bit Bus Transceivers With 3-State Outputs 54ACT16863, 74ACT16863 18-BIT BUS TRANSCEIVERSWITH 3-STATE OUTPUTSSCAS162B – JUNE 1990 – REVISED N ..
74ACT16863DLR , 18-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
74ACT16952DL , 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
74ACT16952DLR , 16-BIT REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
74ACT174 ,Hex D-Type Flip-Flop with Master ResetFunctional Description Truth TableThe AC/ACT174 consists of six edge-triggered D-type flip-Inputs O ..
74ACT174M ,HEX D-TYPE FLIP FLOP WITH CLEAR74ACT174HEX D-TYPE FLIP FLOP WITH CLEAR ■ HIGH SPEED: f = 200MHz (TYP.) at V = 5VMAX CC■ LOW POWER ..
74HC174N ,Hex D-type flip-flop with reset; positive-edge triggerPin configuration DIP16 Fig 5.
74HC174PW ,Hex D-type flip-flop with reset; positive-edge triggerINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC175D ,Quad D-type flip-flop with reset; positive-edge triggerINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HC175DB ,Quad D-type flip-flop with reset; positive-edge triggerGENERAL DESCRIPTIONcorresponding output (Q ) of the flip-flop.nThe 74HC/HCT175 are high-speed Si-ga ..
74HC175N ,Quad D-type flip-flop with reset; positive-edge triggerFeatures and benefits Input levels: For 74HC175: CMOS level For 74HCT175: TTL level Four edge-t ..
74HC175N ,Quad D-type flip-flop with reset; positive-edge triggerapplications where both the truestandard no. 7A.and complement outputs are required and the clock a ..
74ACT16863DL
18-Bit Bus Transceivers With 3-State Outputs
Flow-Through Architecture OptimizesPCB Layout Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise EPIC (Enhanced-Performance Implanted
CMOS) 1-m m Process 500-mA Typical Latch-Up Immunity at
125°C Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) Packages Using
25-mil Center-to-Center Pin Spacings and
380-mil Fine-Pitch Ceramic Flat (WD)
Packages Using 25-mil Center-to-Center
Pin Spacings
descriptionThe ’ACT16863 are 18-bit noninverting
transceivers designed for asynchronous
communication between data buses. The
control-function implementation minimizes
external timing requirements.
The ’ACT16863 can be used as two 9-bit
transceivers or one 18-bit transceiver. They allow
data transmission from the A bus to the B bus or
from the B bus to the A bus, depending on the logic
level at the output-enable (OEAB or OEBA)
inputs.
The 74ACT16863 is packaged in TI’s shrink small-outline package (DL), which provides twice the I/O pin count
and functionality of standard small-outline packages in the same printed-circuit-board area.
The 54ACT16863 is characterized for operation over the full military temperature range of –55°C to 125°C. The
74ACT16863 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each 9-bit section)Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1B1
1B2
GND
1B3
1B4
VCC
1B5
1B6
1B7
GND
1B8
1B9
GND
GND
2B1
2B2
GND
2B3
2B4
2B5CC
2B6
2B7
GND
2B8
2B9
2OEAB
1A1
1A2
GND
1A3
1A4
VCC
1A5
1A6
1A7
GND
1A8
1A9
GND
GND
2A1
2A2
GND
2A3
2A4
2A5CC
2A6
2A7
GND
2A8
2A9
2OEBA
