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74ALVT16373DGG
2.5V/3.3V 16-bit transparent D-type latch 3-State
Product specification
Supersedes data of 1998 Feb 13
IC23 Data Handbook
1999 Oct 18
Philips Semiconductors Product specification
74ALVT163732.5V/3.3V 16-bit transparent D-type latch (3-State)
FEATURES 16-bit transparent latch 5V I/O compatibile 3-State buffers Output capability: +64mA/-32mA TTL input and output switching levels Input and output interface capability to systems at 5V supply Bus-hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs Live insertion/extraction permitted Power-up reset Power-up 3-State No bus current loading when output is tied to 5V bus Latch-up protection exceeds 500mA per JEDEC Std 17 ESD protection exceeds 2000V per MIL STD 883 Method 3015
and 200V per Machine Model
DESCRIPTIONThe 74ALVT16373 is a high-performance BiCMOS product
designed for VCC operation at 2.5V or 3.3V with I/O compatibility up
to 5V.
This device is a 16-bit transparent D-type latch with non-inverting
3-State bus compatible outputs. The device can be used as two
8-bit latches or one 16-bit latch. When latch enable (LE) input is
High, the Q outputs follow the data (D) inputs. When latch enable is
taken Low, the Q outputs are latched at the levels of the D inputs
one setup time prior to the High-to-Low transition.
QUICK REFERENCE DATA
ORDERING INFORMATION
Philips Semiconductors Product specification
74ALVT163732.5V/3.3V 16-bit transparent D-type latch (3-State)
LOGIC SYMBOL
PIN DESCRIPTION
LOGIC SYMBOL (IEEE/IEC)
PIN CONFIGURATION
Philips Semiconductors Product specification
74ALVT163732.5V/3.3V 16-bit transparent D-type latch (3-State)
LOGIC DIAGRAM
FUNCTION TABLE= High voltage level= High voltage level one set-up time prior to the High-to-Low E transition= Low voltage level = Low voltage level one set-up time prior to the High-to-Low E transition
NC= No change= Don’t care= High impedance “off” state= High-to-Low E transition
Philips Semiconductors Product specification
74ALVT163732.5V/3.3V 16-bit transparent D-type latch (3-State)
ABSOLUTE MAXIMUM RATINGS1, 2
NOTES: Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
Philips Semiconductors Product specification
74ALVT163732.5V/3.3V 16-bit transparent D-type latch (3-State)
DC ELECTRICAL CHARACTERISTICS (3.3V �0.3V RANGE)
NOTES: All typical values are at VCC = 3.3V and Tamb = 25°C. This is the increase in supply current for each input at the specified voltage level other than VCC or GND This parameter is valid for any VCC between 0V and 1.2V with a transition time of up to 10msec. From VCC = 1.2V to VCC = 3.3V ± 0.3V a
transition time of 100μsec is permitted. This parameter is valid for Tamb = 25°C only. Unused pins at VCC or GND. ICCZ is measured with outputs pulled up to VCC or pulled down to ground. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power. This is the bus hold overdrive current required to force the input to the opposite logic state.
AC CHARACTERISTICS (3.3V �0.3V RANGE)GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω; Tamb = –40°C to +85°C.
