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Partno	Mfg	Dc	Qty	Available	Descript
74HC10N	TI	N/a	400	avai	Triple 3-input NAND gate
74HCT10DB	PHI	N/a	4000	avai	74HC/HCT10; Triple 3-input NAND gate
74HCT10N	RCA	N/a	22	avai	74HC/HCT10; Triple 3-input NAND gate
74HCT10N	PHILIPS	N/a	7400	avai	74HC/HCT10; Triple 3-input NAND gate

74HCT10N ,74HC/HCT10; Triple 3-input NAND gatePin configuration. Fig.2 Logic symbol.FUNCTION TABLEINPUTS OUTPUTnA nB nC nYLLL HLL H HLHL HLH H H ..
74HCT10N ,74HC/HCT10; Triple 3-input NAND gateINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74HCT112D ,dual JK flip-flop with set and reset; negative-edge triggerGENERAL DESCRIPTIONset-up time prior to the HIGH-to-LOW clock transition forThe 74HC/HCT112 are hig ..
74HCT112D ,dual JK flip-flop with set and reset; negative-edge triggerFEATURES The set and reset inputs, when LOW, set or reset theoutputs as shown in the function table ..
74HCT112N ,74HC112;74HCT112; dual JK flip-flop with set and reset; negative-edge triggerGENERAL DESCRIPTIONset-up time prior to the HIGH-to-LOW clock transition forThe 74HC/HCT112 are hig ..
74HCT11D ,74HC/HCT11; Triple 3-input AND gateINTEGRATED CIRCUITSDATA SHEETFor a complete data sheet, please also download:• The IC06 74HC/HCT/HC ..
74VHC00MTCX_NL ,Quad 2-Input NAND GateFeaturesThe VHC00 is an advanced high-speed CMOS 2-Input

74HC10N-74HCT10DB-74HCT10N
74HC/HCT10; Triple 3-input NAND gate

Philips Semiconductors Product speciﬁcation
Triple 3-input NAND gate 74HC/HCT10
FEATURES Output capability: standard ICC category: SSI
GENERAL DESCRIPTION
The 74HC/HCT10 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL).
They are specified in compliance with JEDEC standard no. 7A.
The 74HC/HCT10 provide the 3-input NAND function.
QUICK REFERENCE DATA
GND= 0 V; Tamb =25 °C; tr =tf= 6 ns
Notes CPD is used to determine the dynamic power dissipation (PD in μW): =CPD× VCC2× fi + ∑ (CL× VCC2× fO) where:= input frequency in MHz= output frequency in MHz= output load capacitance in pF
VCC= supply voltage in V (CL× VCC2×fo)= sum of outputs For HC the condition is VI= GND to VCC
For HCT the condition is VI= GND to VCC− 1.5 V.
ORDERING INFORMATION
See “74HC/HCT/HCU/HCMOS Logic Package Information”.
Philips Semiconductors Product speciﬁcation
Triple 3-input NAND gate 74HC/HCT10
PIN DESCRIPTION
FUNCTION TABLE
Notes H= HIGH voltage level
Philips Semiconductors Product speciﬁcation
Triple 3-input NAND gate 74HC/HCT10
DC CHARACTERISTICS FOR 74HC
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: SSI
AC CHARACTERISTICS FOR 74HC
GND= 0 V; tr =tf= 6 ns; CL= 50 pF
Philips Semiconductors Product speciﬁcation
Triple 3-input NAND gate 74HC/HCT10
DC CHARACTERISTICS FOR 74HCT
For the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: SSI
Note to HCT types
The value of additional quiescent supply current (ΔICC) for a unit load of 1 is given in the family specifications.
To determine ΔICC per input, multiply this value by the unit load coefficient shown in the table below.
AC CHARACTERISTICS FOR 74HCT
GND= 0 V; tr =tf= 6 ns; CL= 50 pF
AC WAVEFORMS
PACKAGE OUTLINES
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