74HCT174DB ,Hex D-type flip-flop with reset; positive-edge triggerGENERAL DESCRIPTIONA LOW level on the MR input forces all outputs LOW,The 74HC/HCT174 are high-spee ..
74HCT174N ,Hex D-type flip-flop with reset; positive-edge triggerFEATURES The 74HC/HCT174 have six edge-triggered D-typeflip-flops with individual D inputs and Q ou ..
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74HC174PW-74HCT174D-74HCT174DB-74HCT174N
Hex D-type flip-flop with reset; positive-edge trigger
Philips Semiconductors Product specification
Hex D-type flip-flop with reset; positive-edge trigger 74HC/HCT174
FEATURES Six edge-triggered D-type flip-flops Asynchronous master reset Output capability: standard ICC category: MSI
GENERAL DESCRIPTIONThe 74HC/HCT174 are high-speed Si-gate CMOS devices
and are pin compatible with low power Schottky TTL
(LSTTL). They are specified in compliance with JEDEC
standard no. 7A.
The 74HC/HCT174 have six edge-triggered D-type
flip-flops with individual D inputs and Q outputs. The
common clock (CP) and master reset (MR) inputs load and
reset (clear) all flip-flops simultaneously.
The register is fully edge-triggered. The state of each D
input, one set-up time prior to the LOW-to-HIGH clock
transition, is transferred to the corresponding output of the
flip-flop.
A LOW level on the MR input forces all outputs LOW,
independently of clock or data inputs.
The device is useful for applications requiring true outputs
only and clock and master reset inputs that are common to
all storage elements.
QUICK REFERENCE DATAGND= 0 V; Tamb=25 °C; tr =tf= 6 ns
Notes CPD is used to determine the dynamic power dissipation (PD in μW): =CPD × VCC2× fi +∑ (CL × VCC2 × fo) where:= input frequency in MHz= output frequency in MHz
∑ (CL × VCC2 × fo)= sum of outputs= output load capacitance in pF
VCC= supply voltage in V For HC the condition is VI= GND to VCC
For HCT the condition is VI= GND to VCC − 1.5 V
Philips Semiconductors Product specification
Hex D-type flip-flop with reset; positive-edge trigger 74HC/HCT174
ORDERING INFORMATION
PIN DESCRIPTION
Philips Semiconductors Product specification
Hex D-type flip-flop with reset; positive-edge trigger 74HC/HCT174
FUNCTION TABLE
Note H= HIGH voltage level= HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition= LOW voltage level= LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition= don’t care LOW-to-HIGH CP transition
Philips Semiconductors Product specification
Hex D-type flip-flop with reset; positive-edge trigger 74HC/HCT174
DC CHARACTERISTICS FOR 74HCFor the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
AC CHARACTERISTICS FOR 74HCGND= 0 V; tr =tf= 6 ns; CL= 50 pF
Philips Semiconductors Product specification
Hex D-type flip-flop with reset; positive-edge trigger 74HC/HCT174
DC CHARACTERISTICS FOR 74HCTFor the DC characteristics see “74HC/HCT/HCU/HCMOS Logic Family Specifications”.
Output capability: standard
ICC category: MSI
Note to HCT typesThe value of additional quiescent supply current (ΔICC) for a unit load of 1 is given in the family specifications.
To determine ΔICC per input, multiply this value by the unit load coefficient shown in the table below.
AC CHARACTERISTICS FOR 74HCTGND= 0 V; tr =tf= 6 ns; CL= 50 pF
Philips Semiconductors Product specification
Hex D-type flip-flop with reset; positive-edge trigger 74HC/HCT174
AC WAVEFORMS
