DAC811KU ,Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTERFEATURESnibble or byte of data can be accomplished simulta-l SINGLE INTEGRATED CIRCUIT CHIPneously ..
DAC811KU ,Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER®DAC811For most current data sheet and other productinformation, visit www.burr-brown.comMicroproce ..
DAC813AU ,Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTERFEATURESFast current switches and laser-trimmed thin-filml ±1/2LSB NONLINEARITY OVERresistors provi ..
DAC813JU ,Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTERMAXIMUM RATINGSPIN NAME DESCRIPTION +V to ACOM .. 0 to +18VCC–V to ACOM .. 0 to –18VCC1+V Positive ..
DAC813JUG4 ,Microprocessor-Compatible 12-Bit D/A Converter 28-SOIC 0 to 70MAXIMUM RATINGSPIN NAME DESCRIPTION +V to ACOM .. 0 to +18VCC–V to ACOM .. 0 to –18VCC1+V Positive ..
DAC813KU ,Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTERDAC813DAC813®DAC813Microprocessor-Compatible12-BIT DIGITAL-TO-ANALOG CONVERTERconverter with voltag ..
DM5473J ,7 V, dual master-slave J-K flip-flop with clear and complementary output73
National '
Semiconductor
5473/DM5473/DM7473
Dual Master-Slave J-K Flip-Flops with Clear
..
DM5474J ,Dual Positive-Edge-Triggered D Flip-Flops with Preset/ Clear and Complementary Outputs5474/DM5474/DM7474DualPositive-Edge-TriggeredDFlip-FlopswithPreset,ClearandComplementaryOutputsJune ..
DM5486J ,Quad 2-Input Exclusive-OR GatesFeaturesYAlternate Military/Aerospace device (5486) is available.This device contains four independ ..
DM5493AJ ,7 V, decade and binary counterFeatures
I Typical power dissipation
- 90A 145 mW
- 93A 130 mW
I Count frequency 42 MHz
I Alte ..
DM54L04J ,Hex Inverting GateDM54L04HexInvertingGateJuly1989DM54L04HexInvertingGateGeneralDescriptionThis device contains six in ..
DM54L93J ,Decade/ Divide-by-12/ and Binary CountersFeaturesYTypical power dissipation 16 mWEach of these monolithic counters contains four master-Ysla ..
DAC811AH-DAC811BH-DAC811JU-DAC811JUG4-DAC811KU
12-bit Digital-to-Analog Converter w/Parallel Interface 28-SOIC 0 to 70
® DAC811 For most current data sheet and other product information, visit www.burr-brown.com Microprocessor-Compatible 12-BIT DIGITAL-TO-ANALOG CONVERTER Input gating logic is designed so that loading the last FEATURES nibble or byte of data can be accomplished simulta- lSINGLE INTEGRATED CIRCUIT CHIP neously with the transfer of data (previously stored in lMICROCOMPUTER INTERFACE: adjacent latches) from adjacent input latches to the Double-Buffered Latch D/A latch. This feature avoids spurious analog output values while using an interface technique that saves lVOLTAGE OUTPUT: ±10V, ±5V, +10V computer instructions. lMONOTONICITY GUARANTEED OVER The DAC811 is laser trimmed at the wafer level and TEMPERATURE is specified to ±1/4LSB maximum linearity error (B l±1/2LSB MAXIMUM NONLINEARITY OVER and K grades) at 25°C and ±1/2LSB maximum over TEMPERATURE the temperature range. All grades are guaranteed mono- lGUARANTEED SPECIFICATIONS AT ±12V tonic over the specification temperature range. AND ±15V SUPPLIES The DAC811 is available in six performance grades lTTL/5V CMOS-COMPATIBLE LOGIC and three package types. DAC811J and K are speci- INPUTS fied over the temperature ranges of 0°C to +70°C; DAC811A and B are specified over –25°C to +85°C; DAC811J and K are packaged in a reliable 28-pin DESCRIPTION plastic DIP or plastic SO package, while DAC811A The DAC811 is a complete, single-chip integrated- and B are available in a 28-pin 0.6" wide dual-inline circuit, microprocessor-compatible, 12-bit digital-to- hermetically sealed ceramic side-brazed package (H analog converter. The chip combines a precision volt- package). age reference, microcomputer interface logic, and double-buffered latch, in a 12-bit D/A converter with 4 MSBs 4 LSBs a voltage output amplifier. Fast current switches and a S laser-trimmed thin-film resistor network provide a J Input Latch Input Latch Input Latch highly accurate and fast D/A converter. R F 10V Microcomputer interfacing is facilitated by a double- D/A Latch buffered latch. The input latch is divided into three R 4-bit nibbles to permit interfacing to 4-, 8-, 12-, or F 12-Bit D/A Converter 16-bit buses and to handle right-or left-justified data. R BPO V The 12-bit data in the input latches is transferred to the OUT Voltage Reference BPO D/A latch to hold the output value. International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111 Twx: 910-952-1111 • Internet: http://www.burr-brown.com/ • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132 ® © 1983 Burr-Brown Corporation PDS-503L Printed in U.S.A. April, 2000 1 DAC811 SBAS144
