IC Phoenix
 
Home ›  DD5 > DAC8512EP-DAC8512FS,% V, Serial Input Complete 12-Bit DAC
DAC8512EP-DAC8512FS Fast Delivery,Good Price
Part Number:
If you need More Quantity or Better Price,Welcom Any inquiry.
We available via phone +865332716050 Email
Partno Mfg Dc Qty AvailableDescript
DAC8512EPPMIN/a8avai% V, Serial Input Complete 12-Bit DAC
DAC8512FSN/a577avai% V, Serial Input Complete 12-Bit DAC


DAC8512FS ,% V, Serial Input Complete 12-Bit DACspecifications based on dice lot qualifications through sample lot assembly and testing.ABSOLUTE MA ..
DAC8531E/250 ,Low Power, Rail-to-Rail Output, 16-Bit, Serial Input Digital-to-Analog Converter(1)ABSOLUTE
DAC8531E/250G4 ,Low Power, Rail-to-Rail Output, 16-Bit, Serial Input Digital-to-Analog ConverterELECTRICAL CHARACTERISTICS (Cont.)V = +2.7V to +5.5V. –40°C to +105°C, unless otherwise specified.D ..
DAC8531E/2K5 ,Low Power, Rail-to-Rail Output, 16-Bit, Serial Input Digital-to-Analog ConverterFEATURES DESCRIPTIONThe DAC8531 is a low-power, single, 16-bit buffered voltage* microPower OPERATI ..
DAC8531E/2K5G4 ,Low Power, Rail-to-Rail Output, 16-Bit, Serial Input Digital-to-Analog ConverterMaximum Ratings”changes could cause the device not to meet its publishedmay cause permanent damage ..
DAC8531IDRBR ,Low Power, Rail-to-Rail Output, 16-Bit, Serial Input Digital-to-Analog ConverterMAXIMUM RATINGSELECTROSTATICV to GND... –0.3V to +6VDD Digital Input Voltage to GND ...... –0.3V to ..
DM54LS251J ,TRI-STATE Data Selectors/MultiplexersFeaturesYTRI-STATE version of LS151These data selectors/multiplexers contain full on-chip bina-Yry ..
DM54LS259J/883 ,8-Bit Serial In to Parallel Out Addressable LatchesapplicationsFour distinct modes of operation are selectable by control-YFour distinct functional mo ..
DM54LS279J ,Quad S-R LatchesFeaturesstored in the latch and appear on the corresponding Q out-YAlternate military/aerospace dev ..
DM54LS283J ,4-Bit Binary Adders with Fast CarryFeaturesYFull-carry look-ahead across the four bitsThese full adders perform the addition of two 4- ..
DM54LS32J ,Quad 2-Input OR Gates54LS32/DM54LS32/DM74LS32Quad2-InputORGatesMay198954LS32/DM54LS32/DM74LS32Quad2-InputORGatesGeneralD ..
DM54LS365AJ ,Hex TRI-STATE BuffersFeatureslines without external resistors. When disabled, both theYAlternate Military/Aerospace devi ..


DAC8512EP-DAC8512FS
% V, Serial Input Complete 12-Bit DAC
REV.A+5 V, Serial Input
Complete 12-Bit DAC
FUNCTIONAL BLOCK DIAGRAM
FEATURES
Space Saving SO-8 or Mini-DIP Packages
Complete, Voltage Output with Internal Reference
1 mV/Bit with 4.095 V Full Scale
Single +5 Volt Operation
No External Components
3-Wire Serial Data Interface, 20 MHz Data Loading Rate
Low Power: 2.5 mW
APPLICATIONS
Portable Instrumentation
Digitally Controlled Calibration
Servo Controls
Process Control Equipment
PC Peripherals
GENERAL DESCRIPTION

The DAC8512 is a complete serial input, 12-bit, voltage output
digital-to-analog converter designed to operate from a single
+5 V supply. It contains the DAC, input shift register and
latches, reference and a rail-to-rail output amplifier. Built using
a CBCMOS process, these monolithic DACs offer the user low
cost, and ease of use in +5 V only systems.
Coding for the DAC8512 is natural binary with the MSB loaded
first. The output op amp can swing to either rail and is set to a
range of 0 V to +4.095 V—for a one-millivolt-per-bit resolution.
It is capable of sinking and sourcing 5 mA. An on-chip reference
is laser trimmed to provide an accurate full-scale output voltage
of 4.095 V.
Serial interface is high speed, three-wire, DSP compatible with
data in (SDI), clock (CLK) and load strobe (LD). There is also
a chip-select pin for connecting multiple DACs.
A CLR input sets the output to zero scale at power on or upon
user demand.
The DAC8512 is specified over the extended industrial (–40°C
to +85°C) temperature range. DAC8512s are available in plas-
tic DIPs and SO-8 surface mount packages.
DIGITAL INPUT CODE – Decimal
LINEARITY ERROR – LSB

Linearity Error vs. Digital Input Code
DAC8512–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS

ANALOG OUTPUT
LOGIC INPUTS
AC CHARACTERISTICS
SUPPLY CHARACTERISTICS
NOTESAll input control signals are specified with tr = tf = 5 ns (10% to 90% of +5 V) and timed from a voltage level of 1.6 V.1 LSB = 1 mV for 0 V to +4.095 V output range.Includes internal voltage reference error.These parameters are guaranteed by design and not subject to production testing.The settling time specification does not apply for negative going transitions within the last 6 LSBs of ground. Some devices exhibit double the typical settling time in
this 6 LSB region.
Specifications subject to change without notice.
(@ VDD = +5.0 V 6 5%, –408C ≤ TA ≤ +858C, unless otherwise noted)
DAC8512
WAFER TEST LIMITS(@ VDD = +5.0 V 6 5%, TA = +258C, applies to part number DAC8512GBC only, unless otherwise noted)

NOTE
Electrical tests are performed at wafer probe to the limits shown. Due to variations in assembly methods and normal yield loss, yield after packaging is not guaranteed
for standard product dice. Consult factory to negotiate specifications based on dice lot qualifications through sample lot assembly and testing.
ABSOLUTE MAXIMUM RATINGS*

VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . .–0.3 V, +10 V
Logic Inputs to GND . . . . . . . . . . . . . . .–0.3 V, VDD + 0.3 V
VOUT to GND . . . . . . . . . . . . . . . . . . . . .–0.3 V, VDD + 0.3 V
IOUT Short Circuit to GND . . . . . . . . . . . . . . . . . . . . . .50 mA
Package Power Dissipation . . . . . . . . . . . . . .(TJ max – TA)/θJA
Thermal Resistance θJA
8-Pin Plastic DIP Package (P) . . . . . . . . . . . . . . . .103°C/W
8-Lead SOIC Package (S) . . . . . . . . . . . . . . . . . . .158°C/W
Maximum Junction Temperature (TJ max) . . . . . . . . .+150°C
Operating Temperature Range . . . . . . . . . . . . .–40°C to +85°C
Storage Temperature Range . . . . . . . . . . . . .–65°C to +150°C
Lead Temperature (Soldering, 10 secs) . . . . . . . . . . . .+300°C
*Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability .
WARNING!
ESD SENSITIVE DEVICE
CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the DAC8512 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
ORDERING GUIDE
DAC8512
Figure 1. Timing Diagram
Figure 2. Equivalent Clock Input Logic
Table I. Control-Logic Truth Table

NOTES↑+ positive logic transition; ↓– negative logic transition; X = Don’t Care.CS and CLK are interchangeable.Returning CS HIGH avoids an additional “false clock” of serial data input.Do not clock in serial data while LD is LOW.
PIN CONFIGURATIONS
SO-8P-DIP-8 & Cerdip-8
PIN DESCRIPTIONS
PinNameDescription

1VDDPositive Supply. Nominal value +5 V, ± 5%.CSChip Select. Active low input.CLKClock input for the internal serial input shift register.SDISerial Data Input. Data on this pin is clocked into the
internal serial register on positive clock edges of the
CLK pin. The Most Significant Bit (MSB) is loaded
first.LDActive low input which writes the serial register data
into the DAC register. Asynchronous input.CLRActive low digital input that clears the DAC register to
zero, setting the DAC to minimum scale. Asynchronous
input.GNDAnalog ground for the DAC. This also serves as the
digital logic ground reference voltage.
8VOUTVoltage output from the DAC. Fixed output voltage
range of 0 V to 4.095 V with 1 mV/LSB. An internal
temperature stabilized reference maintains a fixed
full-scale voltage independent of time, temperature and
power supply variations.
DICE CHARACTERISTICS
OPERATION

The DAC8512 is a complete ready to use 12-bit digital-to-analog
converter. It contains a voltage-switched, 12-bit, laser-trimmed
DAC, a curvature-corrected bandgap reference, a rail-to-rail
output op amp, a DAC register, and a serial data input register.
The serial data interface consists of a CLK, serial data in (SDI),
and a load strobe (LD). This basic 3-wire interface offers maxi-
mum flexibility for interface to the widest variety of serial data
input loading requirements. In addition a CS select is provided
for multiple packaging loading and a power on reset CLR pin to
simplify start or periodic resets.
D/A CONVERTER SECTION

The DAC is a 12-bit voltage mode device with an output that
swings from GND potential to the 2.5 volt internal bandgap
voltage. It uses a laser trimmed R-2R ladder which is switched
by N channel MOSFETs. The output voltage of the DAC has a
constant resistance independent of digital input code. The DAC
output is internally connected to the rail-to-rail output op amp.
AMPLIFIER SECTION

The DAC’s output is buffered by a low power consumption pre-
cision amplifier. This amplifier contains a differential PNP pair
input stage which provides low offset voltage and low noise, as
well as the ability to amplify the zero-scale DAC output volt-
ages. The rail-to-rail amplifier is configured in a gain of 1.6384
(= 4.095 V/2.5 V) in order to set the 4.095 volt full-scale output
(1 mV/LSB). See Figure 3 for an equivalent circuit schematic of
the analog section.
The op amp has a 16 μs typical settling time to 0.01%. There
are slight differences in settling time for negative slowing signals
vs. positive. See the oscilloscope photos in the typical perfor-
mances section of this data sheet.
DAC8512
OUTPUT SECTION

The rail-to-rail output stage of this amplifier has been designed
to provide precision performance while operating near either
power supply.
Figure 4. Equivalent Analog Output Circuit
Figure 4 shows an equivalent output schematic of the rail-to-rail
amplifier with its N channel pull down FETs that will pull an
output load directly to GND. The output sourcing current is
provided by a P channel pull up device that can supply GND
terminated loads, especially at the low supply tolerance values of
4.75 volts. Figures 5 and 6 provide information on output swing
performance near ground and full-scale as a function of load. In
addition to resistive load driving capability the amplifier has also
been carefully designed and characterized for up to 500 pF ca-
pacitive load driving capability.
POWER SUPPLY

The very low power consumption of the DAC8512 is a direct
result of a circuit design optimizing use of the CBCMOS pro-
cess. By using the low power characteristics of the CMOS for
the logic, and the low noise, tight matching of the complemen-
tary bipolar transistors good analog accuracy is achieved.
For power consumption sensitive applications it is important to
note that the internal power consumption of the DAC8512 is
strongly dependent on the actual logic input voltage levels
present on the SDI, CS, LD, and CLR pins. Since these inputs
are standard CMOS logic structures they contribute static
power dissipation dependent on the actual driving logic VOH and
VOL voltage levels. The graph in Figure 9 shows the effect on to-
tal DAC8512 supply current as a function of the actual value of
input logic voltage. Consequently use of CMOS logic vs. TTL
minimizes power dissipation in the static state. A VIL = 0 V on
the SDI, CS and CLR pins provides the lowest standby power
dissipation of 2.5 mW (500 μA × 5 V).
As with any analog system, it is recommended that the DAC8512
power supply be bypassed on the same PC card that contains the
chip. Figure 10 shows the power supply rejection versus frequen-
cy performance. This should be taken into account when using
higher frequency switched mode power supplies with ripple fre-
quencies of 100 kHz and higher.
One advantage of the rail-to-rail output amplifier used in the
DAC8512 is the wide range of usable supply voltage. The part
is fully specified and tested over temperature for operation from
+4.75 V to +5.25 V. If reduced linearity and source current ca-
pability near full scale can be tolerated, operation of the DAC8512
is possible down to +4.3 volts. The minimum operating supply
voltage versus load current plot, in Figure 11, provides informa-
tion for operation below VDD = +4.75 V.
TIMING AND CONTROL

The DAC8512 has a separate serial input register from the
12-bit DAC register that allows preloading of a new data value
into the serial register without disturbing the present DAC out-
put voltage. After the new value is fully loaded in the serial in-
put register it can be asynchronously transferred to the DAC
register by strobing the LD pin. The DAC register uses a level
sensitive LD strobe that should be returned high before any
new data is loaded into the serial input register. At any time the
contents of the DAC register can be reset to zero by strobing
the CLR pin which causes the DAC output voltage to go to
zero volts. All of the timing requirements are detailed in Figure
1 along with the Table I Control-Logic Truth Table.
Figure 5. Output Swing vs. Load
Figure 8. Broadband Noise
Figure 11. Minimum Supply Voltage
vs. Load
Figure 6. Pull-Down Voltage vs. Out-
put Sink Current Capability
Figure 9. Supply Current vs. Logic
Input Voltage
Figure 12. Midscale DAC Glitch
Performance
DAC8512 — Typical Performance Characteristics
Figure 15. Fall Time Detail
Figure 18. Full-Scale Voltage vs.
Temperature
Figure 21. Long Term Drift Acceler-
ated by Burn-In
Figure 14. Rise Time Detail
Figure 17. Total Unadjusted Error
Histogram
Figure 20. Output Voltage Noise vs.
Frequency
APPLICATIONS SECTION
Power Supplies, Bypassing, and Grounding

All precision converter products require careful application of
good grounding practices to maintain full rated performance.
Because the DAC8512 has been designed for +5 V applications,
it is ideal for those applications under microprocessor or micro-
computer control. In these applications, digital noise is preva-
lent; therefore, special care must be taken to assure that its
inherent precision is maintained. This means that particularly
good engineering judgment should be exercised when address-
ing the power supply, grounding, and bypassing issues using the
DAC8512.
The power supply used for the DAC8512 should be well filtered
and regulated. The device has been completely characterized for
a +5 V supply with a tolerance of ±5%. Since a +5 V logic sup-
ply is almost universally available, it is not recommended to
connect the DAC directly to an unfiltered logic supply without
careful filtering. Because it is convenient, a designer might be
inclined to tap a logic circuit’s supply for the DAC’s supply.
Unfortunately, this is not wise because fast logic with nanosec-
ond transition edges induce high current pulses. The high tran-
sient current pulses can generate glitches hundreds of millivolts
in amplitude due to wiring resistances and inductances. This
high frequency noise will corrupt the analog circuits internal to
the DAC and cause errors. Even though their spike noise is
lower in amplitude, directly tapping the output of a +5 V system
supply can cause errors because these supplies are of the switch-
ing regulator type that can and do generate a great deal of high
frequency noise. Therefore, the DAC and any associated analog
circuitry should be powered directly from the system power sup-
ply outputs using appropriate filtering. Figure 23 illustrates how
a clean, analog-grade supply can be generated from a +5 V logic
supply using a differential LC filter with separate power supply
and return lines. With the values shown, this filter can easily
handle 100 mA of load current without saturating the ferrite
cores. Higher current capacity can be achieved with larger ferrite
cores. For lowest noise, all electrolytic capacitors should be low
ESR (Equivalent Series Resistance) type.
Figure 23. Properly Filtering a +5 V Logic Supply Can Yield
a High Quality Analog Supply
In order to fit the DAC8512 in an 8-pin package, it was neces-
sary to use only one ground connection to the device. The
ground connection of the DAC serves as the return path for
supply currents as well as the reference point for the digital in-
put thresholds. The ground connection also serves as the supply
the ground connection of the DAC8512 be connected to a high
quality analog ground, such as the one described above. Gener-
ous bypassing of the DAC’s supply goes a long way in reducing
supply line-induced errors. Local supply bypassing consisting of
a 10 μF tantalum electrolytic in parallel with a 0.1 μF ceramic is
recommended. The decoupling capacitors should be connected
between the DAC’s supply pin (Pin 1) and the analog ground
(Pin 7). Figure 24 shows how the ground and bypass connec-
tions should be made to the DAC8512.
Figure 24. Recommended Grounding and Bypassing
Scheme for the DAC8512
Unipolar Output Operation

This is the basic mode of operation for the DAC8512. As shown
in Figure 24, the DAC8512 has been designed to drive loads as
low as 2 kΩ in parallel with 500 pF. The code table for this op-
eration is shown in Table II.
Figure 25. Unipolar Output Operation
Table II. Unipolar Code Table
DAC8512
Operating the DAC8512 on +12 V or +15 V Supplies Only

Although the DAC8512 has been specified to operate on a
single, +5 V supply, a single +5 V supply may not be available in
many applications. Since the DAC8512 consumes no more than
2.5 mA, maximum, then an integrated voltage reference, such as
the REF02, can be used as the DAC8512 +5 V supply. The
configuration of the circuit is shown in Figure 26. Notice that
the reference’s output voltage requires no trimming because of
the REF02’s excellent load regulation and tight initial output
voltage tolerance. Although the maximum supply current of the
DAC8512 is 2.5 mA, local bypassing of the REF02’s output
with at least 0.1 μF at the DAC’s voltage supply pin is recom-
mended to prevent the DAC’s internal digital circuits from af-
fecting the DAC’s internal voltage reference.
Figure 26. Operating the DAC8512 on +12 V or +15 V
Supplies Using a REF02 Voltage Reference
Measuring Offset Error

One of the most commonly specified endpoint errors associated
with real world nonideal DACs is offset error.
In most DAC testing, the offset error is measured by applying
the zero-scale code and measuring the output deviation from 0
volt. There are some DACs where offset errors may be present
but not observable at the zero scale because of other circuit limi-
tations (for example, zero coinciding with single-supply ground).
In these DACs, nonzero output at zero code cannot be read as
the offset error. In the DAC8512, for example, the zero-scale
error is specified to be ±3 LSBs. Since zero scale coincides with
zero volt, it is not possible to measure negative offset error.
By adding a pull-down resistor from the output of the DAC8412
to a negative supply as shown in Figure 27, offset errors can
now be read at zero code. This configuration forces the output
p-channel MOSFET to source current to the negative supply
thereby allowing the designer to determine in which direction the
offset error appears. The value of the resistor should be such that,
at zero code, current through the resistor is 200 μA, maximum.
Bipolar Output Operation

Although the DAC8512 has been designed for single-supply op-
eration, bipolar operation is achievable using the circuit illus-
trated in Figure 28. The circuit uses a single-supply, rail-to-rail
OP295 op amp and the REF03 to generate the –2.5 V reference
required to level-shift the DAC output voltage. Note that the –
2.5 V reference was generated without the use of precision resis-
tors. The circuit has been configured to provide an output
voltage in the range –5 V ≤ VOUT ≤ +5 V and is coded in com-
plementary offset binary. Although each DAC LSB corresponds
to 1 mV, each output LSB has been scaled to 2.44 mV. Table
III provides the relationship between the digital codes and out-
put voltage.
The transfer function of the circuit is given by:
VO = –1 mV × Digital Code × + 2.5 ×
and, for the circuit values shown, becomes:
VO = –2.44 mV × Digital Code + 5 V
ic,good price


TEL:86-533-2716050      FAX:86-533-2716790
   

©2020 IC PHOENIX CO.,LIMITED