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DP8391AN-DP8391AV
SNI Serial Network Interface
TL/F/9357
DP8391A/NS32491A
SNI
Serial
Network
Interface
July 1993
DP8391A/NS32491A SNI Serial Network Interface
General Description
The DP8391A Serial Network Interface (SNI) providesthe
Manchester data encoding and decoding functionsfor
IEEE 802.3 Ethernet/Cheapernet type local area networks.
TheSNI interfacesthe DP8390 Network Interface Controller
(NIC)tothe Ethernet transceiver cable. When transmitting,
the SNI converts non-return-to-zero (NRZ) data fromthe
controller and clock pulsesinto Manchester encodingand
sendsthe converted data differentiallytothe transceiver.
The opposite process occursonthe receive path, wherea
digital phase-locked loopdecodes10 Mbit/s signalswithas
muchas g18nsof jitter.
The DP8391A SNIisa functionally complete Manchester
encoder/decoder including ECLlike balanced driverandre-
ceivers,on board crystal oscillator, collision signal transla-
tor,anda diagnostic loopback circuit.
TheSNIis partofa three chipsetthat implementsthe com-
plete IEEE compatible network node electronicsas shown
below.The othertwo chipsare theDP8392 Coax Transceiv- Interface (CTI)andthe DP8390 Network Interface Con-
troller (NIC).
IncorporatedintotheCTIarethe transceiver, collisionand
jabber functions.The Media Access Protocolandthe buffer
management tasksare performedbythe NIC. Thereisan
isolation requirementon signaland power lines betweenthe
CTI andthe SNI. Thisis usually accomplishedby usingaset miniaturepulse transformersthat comeina 16-pin plastic
DIPfor signal lines. Power isolation, however,is doneby
usingaDCtoDC converter.
Features Compatible with EthernetII, IEEE 802.3; 10Base5,
10Base2,and 10Base-T10 Mb/s Manchester encoding/decoding with receive
clock recovery Patented digital phase locked loop (DPLL) decoderre-
quiresno precision external components Decodes Manchester data withupto g18nsof jitter Loopback capabilityfor diagnostics Externally selectable halforfull step modesof opera-
tionat transmit output Squelch circuitsatthe receive and collision inputsre-
ject noise High voltage protectionat transceiver interface (16V) TTL/MOS compatible controller interface Connects directlytothe transceiver (AUI) cable
Tableof Contents
1.0 System Diagram
2.0 Block Diagram
3.0 Functional Description
3.1 Oscillator
3.2 Encoder
3.3 Decoder
3.4 Collision Translator
3.5 Loopback
4.0 Connection Diagrams
5.0Pin Descriptions
6.0 Absolute Maximum Ratings
7.0 Electrical Characteristics
8.0 Switching Characteristics
9.0 Timingand Load Diagrams
10.0 Physical Dimensions
1.0 System Diagram
IEEE802.3 CompatibleEthernet/CheapernetLocalArea Network ChipSet
TL/F/9357–1
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
