DP83932CVF-33 ,MHz SONICTM Systems-Oriented Network Interface ControllerFeaturessystem of SONIC offers maximum flexibility in a variety ofY32-bit non-multiplexed address a ..
DP83934AVQB ,SONIC-T Systems-Oriented Network Interface Controller with Twisted Pair InterfaceFeaturesmotherboard designs. Furthermore, the SONIC-T integratesY32-bit non-multiplexed address and ..
DP83934CVUL-20 ,SONIC-T Systems-Oriented Network Interface Controller with Twisted Pair InterfaceFeaturesmotherboard designs. Furthermore, the SONIC-T integratesY32-bit non-multiplexed address and ..
DP83934CVUL-20 ,SONIC-T Systems-Oriented Network Interface Controller with Twisted Pair InterfaceapplicationsSystemDiagramIEEE802.3Ethernet/Thin-Ethernet/10BaseTStationTL/F/11719–1TRI-STATEÉ is a ..
DP83934CVUL-25 ,SONIC-T Systems-Oriented Network Interface Controller with Twisted Pair InterfacePIN DESCRIPTION5.5.4 Dynamically Adding TDA Descriptors3.0
DP83934CVUL-33 ,SONIC-T Systems-Oriented Network Interface Controller with Twisted Pair InterfacePIN DESCRIPTION5.5.4 Dynamically Adding TDA Descriptors3.0
DS90C385AMTX/NOPB ,LVDS Transmitter Flat Panel Display 85MHz 56-TSSOP -10 to 70features• No Special Start-Up Sequence Requiredand improvements making it an ideal replacement forb ..
DS90C385MTD ,+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-85 MHz/ +3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) LFeaturesn 20 to 85 MHz shift clock supportThe DS90C385 transmitter converts 28 bits of CMOS/TTLdata ..
DS90C385MTDX ,+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-85 MHzFeaturesn 20 to 85 MHz shift clock supportThe DS90C385 transmitter converts 28 bits of CMOS/TTLdata ..
DS90C387 ,Dual Pixel LVDS Display Interface (LDI)-SVGA/QXGAFeaturesn Complies with OpenLDI specification for digital displayThe DS90C387/DS90CF388 transmitter ..
DS90C387AVJD ,Dual Pixel LVDS Display Interface / FPD-Link TransmitterFeaturessecond).n Supports SVGA through QXGA panel resolutionsThe LDI chipset is improved over prio ..
DS90C387AVJD NOPB ,Dual Pixel LVDS Display Interface / FPD-Link Transmitter 100-TQFP -10 to 70Maximum Ratings (Note 1) Package Derating:DS90C387 A 18.2mW/˚C above +25˚CIf Military/Aerospace spe ..
DP83932CVF-20-DP83932CVF-25-DP83932CVF-33
MHz SONICTM Systems-Oriented Network Interface Controller
TL/F/10492
DP83932C-20/25/33
MHz
SONIC
Systems-Oriented
Network
Interface
Controller
July 1995
DP83932C-20/25/33 MHz SONICTM
Systems-Oriented Network Interface Controller
General Description
The SONIC (Systems-Oriented Network Interface Control-
ler)isa second-generation Ethernet Controller designedto
meet thedemandsof today’s high-speed32- and16-bitsys-
tems.Its system interface operates witha high speed DMA
that typically consumes less than3%ofthebus bandwidth
(25 MHzbus clock). Selectablebus modes provide bothbig
and little endian byte orderinganda clean interfaceto stan-
dard microprocessors. The linked-list buffer management
systemof SONIC offers maximum flexibilityina varietyof
environments from PC-oriented adaptersto high-speed
motherboard designs. Furthermore,the SONIC integratesa
fully-compatible IEEE 802.3 Encoder/Decoder (ENDEC)al-
lowingfora simple 2-chip solutionfor Ethernet whenthe
SONICis paired withthe DP8392 Coaxial Transceiver Inter-
faceora 10BASE-T transceiver.
For increased performance, the SONIC implementsa
unique buffer management schemeto efficiently process,
receiveand transmit packetsin system memory.No inter-
mediate packet copyis necessary.The receive buffer man-
agement uses three areasin memoryfor(1) allocating addi-
tional resources,(2) indicating status information, and(3)
buffering packet data. During reception,the SONIC stores
packetsinthe buffer area, then indicates receive statusand
control informationinthe descriptor area.The system allo-
cates more memory resourcestothe SONICby addingde-
scriptorstothe memory resource area.The transmit buffer
management usestwo areasin memory:onefor indicating
status and control information andthe otherfor fetching
packet data.The systemcan createa transmit queue allow-
ing multiple packetstobe transmitted froma single transmit
command.The packet datacan resideonany arbitrary byte
boundaryandcan existin several non-contiguous locations.
Features 32-bit non-multiplexed addressand databus High-speed, interruptible DMA Linked-list buffer management maximizes flexibility Two independent 32-byte transmitand receive FIFOs Bus compatibilityforall standard microprocessors Supportsbigand little endian formats Integrated IEEE 802.3 ENDEC Complete address filteringforupto16 physical and/or
multicast addresses 32-bit general-purpose timer Full-duplex loopback diagnostics Fabricatedin low-power CMOS 132 PQFP package Full network management facilities supportthe 802.3
layer management standard Integrated supportfor bridgeand repeater applications
System Diagram
TL/F/10492–2
TRI-STATEÉ isaregistered trademarkof National SemiconductorCorporation.
SONICTM isatrademark ofNationalSemiconductor Corporation.
C1995National SemiconductorCorporation RRD-B30M105/PrintedinU.S.A.
