DS125MB203SQE/NOPB ,12.5Gbps Dual Port MUX and Fanout Buffer 54-WQFN -40 to 85Block Diagram(1)Device InformationMB203PART NUMBER PACKAGE BODY SIZE (NOM)S_INA+S_INA-DS125MB203 WQ ..
DS1260-100 ,Smart BatteryPIN DESCRIPTION Low profile permits mounting on 0.5-inchPins 1, 2, 4, 7, 9, 10 and 14 are No-Conne ..
DS1260-25 ,Smart BatteryFEATURES PIN ASSIGNMENT Encapsulated lithium energy cell with shelflife beyond 10 years Available ..
DS1265AB-70 ,8M Nonvolatile SRAMFEATURES PIN ASSIGNMENT 10 years minimum data retention in the NC 1 36 V CCabsence of externa ..
DS1265W-100 ,3.3V 8Mb Nonvolatile SRAMPIN DESCRIPTIONA0–A19 - Address InputsDQ0–DQ7 - Data In/Data OutCE - Chip EnableWE - Write EnableOE ..
DS1265W-100IND ,3.3V 8Mb Nonvolatile SRAMPIN DESCRIPTION A0–A19 - Address Inputs DQ0–DQ7 - Data In/Data Out CE - Chip Enable WE - Wri ..
DTC114EKAT146 , NPN 100mA 50V Digital Transistors
DTC114EKAT146 , NPN 100mA 50V Digital Transistors
DTC114EKA-T146 , NPN 100mA 50V Digital Transistors
DTC114EM , NPN 100mA 50V Digital Transistors (Bias Resistor Built-in Transistors)
DTC114EM , NPN 100mA 50V Digital Transistors (Bias Resistor Built-in Transistors)
DTC114EM3T5G , Digital Transistors (BRT) NPN Silicon Surface Mount Transistors with Monolithic Bias Resistor Network
DS125MB203SQE/NOPB
12.5Gbps Dual Port MUX and Fanout Buffer
DRIVE 1EXPANDER
MB203S_INA0
D_IN0
RXA_1
SEL0
EXPANDER
S_INB0
S_INA1
S_INA1
S_OUTA0
S_OUTB0
D_OUT0
D_OUT1
RXA_0
TXA_1
TXA_0
RXB_1
RXB_0
TXB_1
TXB_0
DRIVE 0
D_IN+
D_IN-
AD0
AD1
AD2
AD3
ENSMB
SCL(2)
READ_EN / SEL1
SDA
(2)
S_OUTA+
S_OUTA-
GND (DAP)
VIN
SMBus Slave
Mode(1)
S_OUTB+
S_OUTB-
D_OUT+
D_OUT-
S_INA+
S_INA-
S_INB+
S_INB-
Address straps
(pull-up to VIN or
pull-down to
GND)
(1)
(3)
ALL_DONE
MODE
To SMBus/I2C
Host Controller
MB203
SMBus Slave Mode(1)
SMBus Slave Mode
(1)
SATA/SAS
Mode(4)
GND
RESET
1 OF 2
SEL0SMBus Slave Mode(1)
INPUT_EN Receive Equalizationupto 30 dBat 6.25 GHz Transmit De-Emphasisupto –12 dB Transmit Output-Voltage Control: 600 mVto
1300 mV Programmable Through Pin Selection, EEPROM SMBus Interface Selectable 2.5-Vor 3.3-V Supply Voltage –40°Cto +85°C Operating Temperature Range
Applications 10GE, 10G-KR PCIe Gen-1/2/3 SAS2/SATA3 (Upto6 Gbps) XAUI, RXAUI
Simplified Functional Block Diagramwith data ratesupto 12.5 Gbps. The continuous time
linear equalizer (CTLE) of the receiver provides
necessary boostto compensate upto 30-inch FR-4 8-m cable (AWG-24)at 12.5 Gbps. This on-chip
feature eliminates the need for external signal
conditioners. The transmitter features a
programmable amplitude voltage levels to be
selectable from 600 mVp-pto 1300 mVp-p and de-
emphasisofupto12 dB.
The DS125MB203 can be configured to support
PCIe, SAS/SATA, 10G-KR or other signaling
protocols. When operatingin 10G-KR and PCIe Gen- mode, the DS125MB203 transparently allows the
host controller and the end pointto optimize the full
link and negotiate transmit equalizer coefficients. This
seamless managementof the link training protocol
ensures system level interoperability with minimum
latency.
Device Information(1)(1) Forall available packages, see the orderable addendumat
the endofthe data sheet.
Typical Application
