DS90C365MTD ,+3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-85 MHz [Life-time buy]General Descriptionproblems associated with wide, high-speed TTL interfaces.The DS90C385 transmitte ..
DS90C365MTDX ,+3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-85 MHz [Life-time buy]DS90C385/DS90C365 +3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD)Link-85 MHz, + ..
DS90C365MTDX ,+3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-85 MHz [Life-time buy]Block DiagramsDS90C385 DS90C36510086801 10086829Order Number DS90C365MTDOrder Number DS90C385MTD or ..
DS90C383AMTD ,+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz [Life-time buy]Featuresn 20 to 65 MHz shift clock supportThe DS90C383A/DS90CF383A transmitter converts 28 bitsof C ..
DS90C383AMTD . ,+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz [Life-time buy]DS90C383A/DS90CF383A +3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD)Link-65 MHz ..
DS90C383AMTDX ,+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-65 MHz [Life-time buy]Featuresn 20 to 65 MHz shift clock supportThe DS90C383A/DS90CF383A transmitter converts 28 bitsof C ..
DS90C365MTD-DS90C365MTDX
+3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-85 MHz [Life-time buy]
DS90C385/DS90C365
+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel
Display (FPD) Link-85 MHz, +3.3V Programmable LVDS
Transmitter 18-Bit Flat Panel Display (FPD) Link-85 MHz
General DescriptionThe DS90C385 transmitter converts28 bitsof LVCMOS/
LVTTL data into four LVDS (Low Voltage Differential Signal-
ing) data streams.A phase-locked transmit clockis transmit-
tedin parallel with the data streams overa fifth LVDS link.
Every cycleof the transmit clock28 bitsof input data are
sampled and transmitted.Ata transmit clock frequencyof85
MHz,24 bitsof RGB data and3 bitsof LCD timing and
control data (FPLINE, FPFRAME, DRDY)are transmittedat rateof 595 Mbpsper LVDS data channel. Usinga85 MHz
clock, the data throughputis 297.5 Mbytes/sec. Also avail-
ableis the DS90C365 that converts21 bitsof LVCMOS/
LVTTL data into three LVDS (Low Voltage Differential Sig-
naling) data streams. Both transmitters canbe programmed
for Rising edge strobeor Falling edge strobe througha
dedicated pin.A Rising edgeor Falling edge strobe transmit-
ter will interoperate witha Falling edge strobe Receiver
(DS90CF386/DS90CF366) without any translation logic.
The DS90C385is also offeredina64 ball, 0.8mm fine pitch
ball grid array (FBGA) package which providesa44%
reductionin PCB footprint comparedtothe TSSOP package.
This chipsetisan ideal meansto solve EMI and cable size
problems associated with wide, high-speed TTL interfaces.
Features20to85 MHz shift clock support Best–in–Class Set& Hold Timeson TxINPUTsTx power consumption <130 mW (typ) @85MHz
GrayscaleTx Power-down mode <200µW (max) Supports VGA, SVGA, XGA and Dual Pixel SXGA. Narrow bus reduces cable size and cost Upto 2.38 Gbps throughput Upto 297.5 Megabytes/sec bandwidth 345 mV (typ) swing LVDS devicesfor low EMI PLL requiresno external components Compatible with TIA/EIA-644 LVDS standard Low profile 56-leador 48-lead TSSOP package DS90C385 also availableina64 ball, 0.8mm fine pitch
ball grid array (FBGA) package
Block Diagrams
DS90C385Order Number DS90C385MTDor DS90C385SLC
SeeNS Package Number MTD56or SLC64A
DS90C365
Order Number DS90C365MTD
SeeNS Package Number MTD48
May 2003
DS90C385/DS90C365
+3.3V
Programmable
VDS
ransmitter
24-Bit
Flat
Panel
Display
(FPD)
Link-85
MHz,
+3.3V
Programmable
VDS
ransmitter
18-Bit
Flat
Panel
Display
(FPD)
Link-85