DS90C385MTD ,+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-85 MHz/ +3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) LFeaturesn 20 to 85 MHz shift clock supportThe DS90C385 transmitter converts 28 bits of CMOS/TTLdata ..
DS90C385MTDX ,+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-85 MHzFeaturesn 20 to 85 MHz shift clock supportThe DS90C385 transmitter converts 28 bits of CMOS/TTLdata ..
DS90C387 ,Dual Pixel LVDS Display Interface (LDI)-SVGA/QXGAFeaturesn Complies with OpenLDI specification for digital displayThe DS90C387/DS90CF388 transmitter ..
DS90C387AVJD ,Dual Pixel LVDS Display Interface / FPD-Link TransmitterFeaturessecond).n Supports SVGA through QXGA panel resolutionsThe LDI chipset is improved over prio ..
DS90C387AVJD NOPB ,Dual Pixel LVDS Display Interface / FPD-Link Transmitter 100-TQFP -10 to 70Maximum Ratings (Note 1) Package Derating:DS90C387 A 18.2mW/˚C above +25˚CIf Military/Aerospace spe ..
DS90C387AVJD/NOPB ,Dual Pixel LVDS Display Interface / FPD-Link Transmitter 100-TQFP -10 to 70General DescriptionThe DS90C387A/DS90CF388A transmitter/receiver pair is vides a reliable interface ..
DS90C385MTD
+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link-85 MHz/ +3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) L
DS90C385/DS90C365
+3.3V Programmable LVDS Transmitter 24-Bit Flat Panel
Display (FPD) Link-85 MHz, +3.3V Programmable LVDS
Transmitter 18-Bit Flat Panel Display (FPD) Link-85 MHz
General DescriptionThe DS90C385 transmitter converts28bitsof CMOS/TTL
dataintofour LVDS(LowVoltage Differential Signaling) data
streams.A phase-locked transmit clockis transmittedinpar-
allelwith thedata streamsoverafifth LVDS link.Every cyclethe transmit clock28bitsof input dataare sampledand
transmitted.Ata transmitclock frequencyof85 MHz,24bits RGB data and3 bitsof LCD timing and control data
(FPLINE, FPFRAME, DRDY)are transmittedatarate of595
Mbpsper LVDS data channel. Usinga85 MHz clock,the
data throughputis 297.5 Mbytes/sec. Also availableisthe
DS90C365 that converts21 bitsof CMOS/TTL data into
three LVDS (Low Voltage Differential Signaling) data
streams. Both transmitters canbe programmedfor Rising
edge strobeor Falling edge strobe througha dedicatedpin. Rising edgeor Falling edge strobe transmitterwill interop-
erate witha Falling edge strobe Receiver (DS90CF386/
DS90CF366) withoutany translation logic.
This chipsetisan ideal meansto solve EMIand cable size
problems associated with wide, high speed TTL interfaces.
Features20to85 MHz shift clock support Best–in–ClassSet& Hold Timeson TxINPUTsTx power consumption <130 mW (typ) @85MHz
GrayscaleTx Power-down mode <200μW (max) Supports VGA, SVGA, XGAand Single/Dual Pixel
SXGA. Narrowbus reduces cable sizeand costUpto 2.38 Gbps throughputUpto 297.5 Megabytes/sec bandwidth 345mV (typ) swing LVDS devicesforlow EMI PLL requiresno external components Compatible with TIA/EIA-644 LVDS standard Low profile 56-leador 48-lead TSSOP package
Block DiagramsTRI-STATE®isa registeredtrademark ofNationalSemiconductorCorporation.
DS90C385DS100868-1
Order Number DS90C385MTD
SeeNS Package Number MTD56
DS90C365DS100868-29
Order Number DS90C365MTD
SeeNS Package Number MTD48January 1999
DS90C385/DS90C365
+3.3V
Programmable
VDS
ransmitter
24-Bit
Flat
Panel
Display
(FPD)
Link-85
MHz,
+3.3V
Programmable
VDS
ransmitter
18-Bit
Flat
Panel
Display
(FPD)Link-85
MHz 1999 National Semiconductor Corporation DS100868
