DS90C402MX/NOPB ,Dual Low Voltage Differential Signaling (LVDS) Receiver 8-SOIC -40 to 85 SNLS001C –JUNE 1998–REVISED APRIL 2013Switching Characteristics(1)(2)(3)(4)(5)V = +5.0V ± 10%, T = ..
DS90CF363AMTD ,+3.3V LVDS Transmitter 18-Bit Flat Panel Display (FPD) LinkFeaturesn 20 to 65 MHz shift clock supportThe DS90C363A/DS90CF363A transmitter converts 21 bitsofCM ..
DS90CF363AMTDX ,+3.3V LVDS Transmitter 18-Bit Flat Panel Display (FPD) LinkFeaturesn 20 to 65 MHz shift clock supportThe DS90C363A/DS90CF363A transmitter converts 21 bitsofCM ..
DS90CF363BMT ,+3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) LinkElectrical CharacteristicsOver recommended operating supply and temperature ranges unless otherwise ..
DS90CF363BMT ,+3.3V Programmable LVDS Transmitter 18-Bit Flat Panel Display (FPD) LinkGeneral Descriptionlogic low when input clock is missing and when /PD pinTheDS90CF363Btransmitterco ..
DS90CF363MTD ,+3.3V LVDS Transmitter 18-Bit Flat Panel Display (FPD) Link-65 MHz [Life-time buy]Electrical CharacteristicsOver recommended operating supply and temperature ranges unless otherwise ..
DS90C402MX/NOPB
Dual Low Voltage Differential Signaling (LVDS) Receiver
DS90C402
www.ti.com SNLS001C–JUNE 1998–REVISED APRIL 2013
DS90C402 Dual Low Voltage Differential Signaling (LVDS) Receiver
Checkfor Samples: DS90C402
1FEATURES DESCRIPTIONThe DS90C402isa dual receiver device optimized
Ultra Low Power Dissipation for high data rate and low power applications. This
• Operates above 155.5 Mbps device along with the DS90C401 providesa pair chip
Standard TIA/EIA-644 solution fora dual high speed point-to-point interface.
The deviceisina PCB space saving8 lead small
• 8 Lead SOIC Package saves PCB space outline package. The receiver offers ±100 mV
• VCM ±1V center around 1.2V threshold sensitivity,in addition to common-mode
• ±100 mV Receiver Sensitivity noise protection.
Connection Diagram
See Package NumberD (SOIC)
Functional DiagramThese devices have limited built-in ESD protection. The leads shouldbe shorted togetherorthe device placedin conductive foamto prevent electrostatic damagetothe MOS gates.
