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IR3093MPBF-IR3093MTRPBF
3-Phase IC for Opteron Athlon or VR10
International
Tait Rectifier IR3093PbF
DATA SHEET
3 PHASE OPTERON, ATHLON, on VRIthX CONTROL IC
DESCRIPTION
The IR3093 Control IC provides a full featured, cost effective, single chip solution to implement robust
power conversion solutions for three different microprocessor families; 1) AMD's Opteron, 2) AMD's
Athlon or 3) Intel's VR-10.X family of processors. The user can select the appropriate VID range with a
Control and 3 phase Gate Drive functions are integrated into a single cost effective IC. . In
single pin.
addition to CPU power, IR3093 offers a compact, efficient solution for high current POL converters.
FEATURES
ORDERING INFORMATION
5 bit or 6 bit VID with 0.5% overall system accuracy
Selectable VID Code for AMD Opteron or Athlon or Intel VR10.X
Programmable Slew Rate response to "On-the-Fly" VID Code Changes
3A GATELX Pull Down Drive Capability
Programmable 100KHz to 540KHz oscillator
Programmable Voltage Positioning (can be disabled)
Programmable Softstart
Programmable Hiccup Over-Current Protection with Delay to prevent false triggering
Simplified Powergood provides indication of proper operation and avoids false triggering
Operates up to 21V input with 7.9V Under-Voltage Lockout
5V UVL with 4.36V Under-Voltage Lockout threshold
Adjustable Voltage, 150mA Bias Regulator provides MOSFET Drive Voltage
Enable Input
OVP Flag Output detects high side fet short at powerup
Pin compatible with IR3092, 2-phase PWM Control IC
Available 48L MLPQ package
Device Order Quantity
IR3093MTRPbF 3000 per Reel
IR3093MPbF 100 piece strips
PACKAGE INFORMATION
Page 1 of 39
VOSNS-
SS/DEL
SCONPZ
SCONPS
V|D0 —
V|D5 —
SVREF —
OVPSNS —
CSINP1 —
CSINM1
ENABLE —
IR3093
48LDMLF'Q
VCCH1 —
GATEH1
GATELI
VCCLI_2
GATEL2
GATEH2
GATEH3
llllllllllll
— SETBIAS
_ CSINP3
_ CSINM3
_ LGND
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_ BIASOUT
_ PWHGD
_ CSINP2
_ CSINM2
_ VID SEL
-— vcdla
— GATELS
48L MLPQ
(7 x 7 mm Body)
eJA = 27°C/W
09/08/05
International
Tait Rectifier
PIN DESCRIPTION
IR3093PbF
PIN# PIN SYMBOL PIN DESCRIPTION
1 VlD3 Inputs to VID D to A Converter
2 VID4 Inputs to VID D to A Converter
3 ROSC Connect a resistor to VOSNS- to program oscillator frequency and FB, OCSET, BBFB, and VDAC bias currents
4 VOSNS- Remote Sense Input. Connect to ground at the Load.
5 OCSET Programs the hiccup over-current threshold through an external resistor tied to VDAC and an internal current
source.
6 VDAC _Rtqylat.ed voltage programmed by the VID inputs. Current Sensing and Over Current Protection are referenced
to this pm. Connect an external RC network to VOSNS- to program Dynamic VID slew rate.
7 VDRP Buffered IIN signal. Connect an external RC network to FB to program converter output impedance
Inverting input to the Error Amplifier. Converter output voltage is offset from the VDAC voltage through an
8 FB external resistor connected to the converter output voltage at the load and an internal current source. Bias
current is a function of ROSC. Also OVP sense
9 EAOUT Output of the Error Amplifier
10 SS/DEL Controls Conyetter Softstart, Power Good, and Over-Current Timing. Connect an external capacitor to LGND to
program the timing.
11 SCOMP2 Compensation for the Current Share control loop. Connect a capacitor to ground to set the control Ioop's
bandwidth. Phase 2 IS forced to match phase I's current.
12 SCOMP3 Compensation for the Current Share control loop. Connect a capacitor to ground to set the control Ioop's
bandwidth. Phase 3 IS forced to match phase I's current.
13 LGND Local Ground and IC substrate connection
14 SETBIAS External resistor to ground sets voltage at BIASOUT pin. Bias current is a function of ROSC.
15 VCC Power for internal circuitry and source for BIASOUT regulator
16 CSINP3 Non-inverting input to the Phase 3 Current Sense Amplifier.
17 CSINM3 Inverting input to the Phase 3 Current Sense Amplifier.
18 BIASOUT 200mA open-Iooped regulated voltage set by SETBIAS for GATE drive bias.
19 PWRGD Open Collector output that drives low during Softstart or any fault condition. Connect external pull-up.
20 CSINP2 Non-inverting input to the Phase 2 Current Sense Amplifier.
21 CSINM2 Inverting input to the Phase 2 Current Sense Amplifier.
22 VID_SEL Ground Selects VR10.X VID, Float Selects OPTERON VID, VCC Selects ATHLON VID
23 VCCL3 Power for Phase 3 Low-Side Gate Driver.
24 GATEL3 Phase 3 Low-Side Gate Driver Output and input to GATEH3 non-overlap comparator.
25 PGND3 Return for Phase 3 Gate Drivers
26 GATEH3 Phase 3 High-Side Gate Driver Output and input to GATEL3 non-overlap comparator.
27 VCCH3 Power for Phase 3 High-Side Gate Driver
28 VCCH2 Power for Phase 2 High-Side Gate Driver
29 GATEH2 Phase 2 High-Side Gate Driver Output and input to GATEL2 non-overlap comparator.
30 PGND2 Return for Phase 2 Gate Drivers
31 GATEL2 Phase 2 Low-Side Gate Driver Output and input to GATEH2 non-overlap comparator.
32 SVUVL Can be usedto m_or_1i_tor the driver supply voltage or 5V supply voltage when converting from 5V. An under
voltage condition Inmates Soft Start.
33 VCCL1_2 Power for Phase 1 and 2 Low-Side Gate Drivers.
34 GATEL1 Phase 1 Low-Side Gate Driver Output and input to GATEH1 non-overlap comparator.
35 PGND1 Return for Phase 1 Gate Drivers
36 GATEH1 Phase 1 High-Side Gate Driver Output and input to GATEL1 non-overlap comparator.
37 VCCH1 Power for Phase 1 High-Side Gate Driver
38 NC Not connected
39 CSINM1 Inverting input to the Phase 1Current Sense Amplifier.
40 CSINP1 Non-inverting input to the Current Sense Amplifier.
41 OVP Output that drives high during an Over-Voltage condition.
42 ENABLE Enable Input. A logic low applied to this pin puts the IC into Fault mode.
43 OVPSNS Dedicated output voltage sense pin for Over Voltage Protection.
44 5VREF Compensation for internal voltage reference rail.
45 VID5 Inputs to VID D to A Converter
46 VIDO Inputs to VID D to A Converter
47 N/IDI Inputs to VID D to A Converter
48 VID2 Inputs to VID D to A Converter
Page 2 of 39 09/08/05
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