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MAX1366ECM+ |MAX1366ECMMAXIM/DALLASN/a10avaiMicrocontroller-Interface, 4.5-/3.5-Digit Panel Meters with 4-20mA Output


MAX1366ECM+ ,Microcontroller-Interface, 4.5-/3.5-Digit Panel Meters with 4-20mA OutputFeaturesThe MAX1366/MAX1368 low-power, 4.5- and 3.5-digit,♦ Microcontroller (µC)-Interface, Digital ..
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MAX1366ECM+
Microcontroller-Interface, 4.5-/3.5-Digit Panel Meters with 4-20mA Output
General Description
The MAX1366/MAX1368 low-power, 4.5- and 3.5-digit,
panel meters feature an integrated sigma-delta analog-
to-digital converter (ADC), LED display drivers, voltage
digital-to-analog converter (DAC), and a 4–20mA (or 0
to 16mA) current driver.
The MAX1366/MAX1368’s analog input voltage range is
programmable to either ±2V or ±200mV. The MAX1368
drives a 3.5-digit (±1999 count) display and the
MAX1366 drives a 4.5-digit (±19,999 count) display.
The ADC output directly drives the LED display as well
as the voltage DAC, which, in turn, drives the 4–20mA
(or 0 to 16mA) current-loop output.
In normal operation, the 0 to 16mA/4–20mA current-
loop output follows the ±2V or ±200mV analog input to
drive remote panel-meter displays, data loggers, and
other industrial controllers. For added flexibility, the
MAX1366/MAX1368 allow direct access to the ADC
result, DAC output, and the V/I converter input.
The sigma-delta ADC does not require external preci-
sion integrating capacitors, autozero capacitors, crystal
oscillators, charge pumps, or other circuitry commonly
required in dual-slope ADC panel-meter circuits. On-
chip analog input and reference buffers allow direct
interface with high-impedance signal sources. Excellent
common-mode rejection and digital filtering provides
greater than 100dB rejection of simultaneous 50Hz and
60Hz line noise. Other features include data hold and
peak detection and overrange/underrange detection.
The MAX1366/MAX1368 require a 2.7V to 5.25V supply,
a 4.75V to 5.25V V/I supply, and a 7V to 30V loop sup-
ply. They are available in a space-saving (7mm x
7mm), 48-pin TQFP package and operate over the
extended (-40°C to +85°C) temperature range.
Applications

Industrial Process Control
Automated Test Equipment
Data-Acquisition Systems
Digital Panel Meters
Digital Voltmeters
Digital Multimeters
Features
Microcontroller (µC)-Interface, Digital Panel Meter
20-Bit Sigma-Delta ADC
4.5-Digit Resolution (±19,999 Count, MAX1366)
3.5-Digit Resolution (±1999 Count, MAX1368)
No Integrating/Autozeroing Capacitors
100MΩInput Impedance
±200mV or ±2.000V Input Range
LED Display
Common-Cathode 7-Segment LED Driver
Programmable LED Current (0 to 20mA)
2.5Hz Update Rate
Output DAC and Current Driver
±15-Bit DAC with 14-Bit Linear V/I Converter
Selectable 0 to 16mA or 4–20mA Current Output
Unipolar/Bipolar Modes
±50µA Zero Scale, ±40ppmFS/°C (typ)
±0.5% Gain Error, ±25ppmFS/°C (typ)
Separate 7V to 30V Supply for Current-Loop
Output
2.7V to 5.25V ADC/DAC Supply4.75V to 5.25V V/I Converter SupplyInternal 2.048V Reference or External ReferenceSPI™-/QSPI™-/MICROWIRE™-Compatible Serial
Interface
48-Pin, 7mm x 7mm TQFP Package
MAX1366/MAX1368
Microcontroller-Interface,
4.5-/3.5-Digit Panel Meters with 4–20mAOutput
Selector Guide

19-3977; Rev 0; 1/06
EVALUATION KIT
AVAILABLE
PARTTEMP RANGEPIN-PACKAGE
MAX1366ECM
-40°C to +85°C48 TQFP
MAX1368ECM
-40°C to +85°C48 TQFP
Ordering Information
PARTPACKAGE CODERESOLUTION
(DIGITS)

MAX1366ECMC48-64.5
MAX1368ECMC48-63.5
Pin Configuration appears at end of data sheet.
Typical Operating Circuits appear at end of data sheet.

SPI/QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
MAX1366/MAX1368
Microcontroller-Interface, 4.5-/3.5-Digit Panel
Meters with 4–20mAOutput
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(AVDD= DVDD= DAC_VDD = +2.7V to +5.25V, GND = 0, LEDG = 0, VLEDV= +2.7V to +5.25V, VREF+- VREF-= 2.048V (external
reference), VEXT= 7V, VREG_AMP = +5.0V, CREF+= 0.1µF, REF- = GND, CNEGV= 0.1µF. Internal clock mode, unless otherwise
noted. All specifications are at TA= TMINto TMAX. Typical values are at TA = +25°C, unless otherwise noted.)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
(With reference to GND, unless otherwise specified.)
AVDD,DVDD....................................................................-0.3V to +6.0V
AIN+, AIN-, REF+, REF-.........................VNEGV to (AVDD+ 0.3V)
REG_FORCE, CMP, DAC_VDD, DACVOUT,
CONV_IN, 4-20OUT.............................-0.3V to (AVDD+ 0.3V)
EN_BPM, EN_I, REFSELE, DACDATA_SEL,
CLK, EOC,CS_DAC, SCLK, DIN
DOUT.....................................................-0.3V to (DVDD+ 0.3V)
NEGV.......................................................-2.6V to (AVDD+ 0.3V)
LED_EN....................................................-0.3V to (DVDD+ 0.3V)
SET...........................................................-0.3V to (AVDD+ 0.3V)
REG_AMP, REG_VDD...........................................-0.3V to +6.0V
LEDG.....................................................................-0.3V to +0.3V
GND_DAC.............................................................-0.3V to +0.3V
GND_V/I.................................................................-0.3V to +0.3V
SEG_ to LEDG.........................................-0.3V to (VLEDV + 0.3V)
DIG_ to LEDG..........................................-0.3V to (VLEDV + 0.3V)
LOWBATT................................................-0.3V to (AVDD + 0.3V)
REF_DAC.................................................-0.3V to (AVDD+ 0.3V)
DACVOUT................................................-0.3V to (AVDD + 0.3V)
DIG_ Sink Current.............................................................300mA
DIG_ Source Current...........................................................50mA
SEG_ Sink Current..............................................................50mA
SEG_ Source Current..........................................................50mA
Maximum Current Input into Any Other Pin........................50mA
Continuous Power Dissipation (TA= +70°C)
48-Pin TQFP (derate 22.7mW/°C above +70°C).....1818.2mW
Operating Temperature Range...........................-40°C to +85°C
Storage Temperature Range.............................-60°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
ADC ACCURACY

MAX1366-19,999+19,999Noise-Free ResolutionMAX1368-1999+1999Counts
2.000V range±1Integral Nonlinearity (Note 1)INL200mV range±1Counts
Range-Change Ratio(VAIN+ - VAIN- = 0.100V) on 200mV range;
(VAIN+ - VAIN- = 0.100V) on 2.0V range10:1Ratio
Rollover ErrorVAIN+ - VAIN- = full scale±1Counts
Output Noise10µVP-P
Offset Error (Zero Input Reading)VAIN+ - VAIN- = 0 (Note 2)-0+0Counts
Gain Error(Note 3)-0.5+0.5%FSR
Offset Drift (Zero Reading Drift) VAIN+ - VAIN- = 0 (Note 4)0.1µV/°C
Gain Drift±1ppm/°C
INPUT CONVERSION RATE

External Clock Frequency4.9152MHz
External Clock Duty Cycle4060%
Internal clock5Update RateExternal clock, fCLK = 4.9152MHz5Hz
ANALOG INPUTS (AIN+, AIN-) (bypass to GND with 0.1µF or greater capacitors)

RANGE bit = 0-2.0+2.0AIN Input Voltage Range (Note 5)RANGE bit = 1-0.2+0.2V
MAX1366/MAX1368
Microcontroller-Interface, 4.5-/3.5-Digit Panel
Meters with 4–20mAOutput
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

AIN Absolute Input Voltage
Range to GND-2.2+2.2V
Internal clock mode,
50Hz and 60Hz ±2%100
Normal-Mode 50Hz and 60Hz
Rejection (Simultaneously)External clock mode,
50Hz and 60Hz ±2%, fCLK = 4.9152MHz100
Common-Mode 50Hz and 60Hz
Rejection (Simultaneously)CMRFor 50Hz and 60Hz ±2%, RSOURCE <
10kΩ150dB
Common-Mode RejectionCMRAt DC100dB
Input Leakage Current10nA
Input Capacitance10pF
Average Dynamic Input Current(Note 6)-20+20nA
LOW-BATTERY VOLTAGE MONITOR (LOWBATT)

LOWBATT Trip Threshold2.048V
LOWBATT Leakage Current10pA
Hysteresis20mV
INTERNAL REFERENCE (REF- = GND, INTREF = DVDD)

REF Input VoltageVREFAVDD = 5V2.0072.0482.089V
REF Output Short-Circuit Current1mA
REF Output Temperature
CoefficientTCVREF40ppm/°C
Load RegulationISOURCE = 0 to 300µA, ISINK = 0 to 30µA6µV/µA
Line Regulation50µV/V
0.1Hz to 10Hz25Noise Voltage10Hz to 10kHz400µVP-P
EXTERNAL REFERENCE (INTREF BIT = 0)

REF Input VoltageDifferential, (VREF+ - VREF-)2.048V
Absolute REF+, REF- Input
Voltage to GND (VREF+ must be
greater than VREF-)
-2.2+2.2V
Internal clock mode,
50Hz and 60Hz ±2%100
Normal-Mode 50Hz and 60Hz
Rejection (Simultaneously)External clock mode,
50Hz and 60Hz ±2%, fCLK = 4.9152MHz120
Common-Mode 50Hz and 60Hz
Rejection (Simultaneously)CMRFor 50Hz and 60Hz ±2%, RSOURCE <
10kΩ150dB
Common-Mode RejectionCMRAt DC100dB
Input Leakage Current10nA
ELECTRICAL CHARACTERISTICS (continued)

(AVDD= DVDD= DAC_VDD = +2.7V to +5.25V, GND = 0, LEDG = 0, VLEDV= +2.7V to +5.25V, VREF+- VREF-= 2.048V (external
reference), VEXT= 7V, VREG_AMP = +5.0V, CREF+= 0.1µF, REF- = GND, CNEGV= 0.1µF. Internal clock mode, unless otherwise
noted. All specifications are at TA= TMINto TMAX. Typical values are at TA = +25°C, unless otherwise noted.)
MAX1366/MAX1368
Microcontroller-Interface, 4.5-/3.5-Digit Panel
Meters with 4–20mAOutput
ELECTRICAL CHARACTERISTICS (continued)

(AVDD= DVDD= DAC_VDD = +2.7V to +5.25V, GND = 0, LEDG = 0, VLEDV= +2.7V to +5.25V, VREF+- VREF-= 2.048V (external
reference), VEXT= 7V, VREG_AMP = +5.0V, CREF+= 0.1µF, REF- = GND, CNEGV= 0.1µF. Internal clock mode, unless otherwise
noted. All specifications are at TA= TMINto TMAX. Typical values are at TA = +25°C, unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

Input Capacitance10pF
Average Dynamic Input Current(Note 6)-20+20nA
CHARGE PUMP

Output VoltageNEGVCNEGV = 0.1µF to GND-2.60-2.42-2.30V
DIGITAL INPUTS (SCLK, DIN, CS, CLK)

Input CurrentIINVIN = 0 or DVDD-10+10µA
Input Low VoltageVINL0.3 x
DVDDV
Input High VoltageVINH0.7 x
DVDDV
Input HysteresisVHYSDVDD = 3V200mV
DIGITAL OUTPUTS (DOUT, EOC)

Output Low VoltageVOLISINK = 1mA0.4V
Output High VoltageVOHISOURCE = 200µA0.8 x
DVDDV
Tri-State Leakage CurrentIL-10+10µA
Tri-State Output CapacitanceCOUT15pF
ADC POWER SUPPLY (Note 10)

AVDD VoltageAVDD2.705.25V
DVDD VoltageDVDD2.705.25V
Power-Supply Rejection AVDDPSRA(Note 7)80dB
Power-Supply Rejection DVDDPSRD(Note 7)100dB
640AVDD Current (Notes 8, 9)IAVDDStandby mode305µA
DVDD = +5.25V320
DVDD = +3.3V180DVDD Current (Notes 8, 9)IDVDD
Standby mode20
DAC POWER SUPPLY

DAC Supply VoltageVDAC_VDD2.705.25V
DAC Supply Current0.100.21mA
LINEAR REGULATOR AND V/I CONVERTER POWER REQUIREMENTS

REG_AMP Supply VoltageVREG_AMP4.755.25V
REG_AMP Supply Current0.190.30mA
REG_VDD VoltageVREG_VDD5.20V
MAX1366/MAX1368
Microcontroller-Interface, 4.5-/3.5-Digit Panel
Meters with 4–20mAOutput
ELECTRICAL CHARACTERISTICS (continued)

(AVDD= DVDD= DAC_VDD = +2.7V to +5.25V, GND = 0, LEDG = 0, VLEDV= +2.7V to +5.25V, VREF+- VREF-= 2.048V (external
reference), VEXT= 7V, VREG_AMP = +5.0V, CREF+= 0.1µF, REF- = GND, CNEGV= 0.1µF. Internal clock mode, unless otherwise
noted. All specifications are at TA= TMINto TMAX. Typical values are at TA = +25°C, unless otherwise noted.)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

REG_VDD Supply CurrentIncludes 20mA programmed current25.227.4mA
LED DRIVERS (Table 7)

LED Supply VoltageVLEDV2.705.25V
LED Shutdown Supply CurrentISHDN10µA
LED Supply CurrentILEDVSeven segments and decimal point on,
RSET = 25kΩ176180mA
MAX1366512Display Scan RatefOSCMAX1368640Hz
Segment Current Slew RateISEG/∆t25mA/µs
DIG_ Voltage LowVDIGIDIG_ = 176mA0.1780.300V
Segment-Drive Source-Current
Matching∆ISEG3±10%
Segment-Drive Source CurrentISEGVLEDV - VSEG = 0.6V, RSET = 25kΩ15.021.525.5mA
LED Drivers Bias CurrentFrom AVDD120µA
Interdigit Blanking Time4µs
4-20OUT OUTPUT ACCURACY

Zero-Scale Error4mA or 0mA, at +25°C±10±50µA
Zero-Scale Error Tempco±40p p mFS /° C
Gain Error4mA or 0mA, at +25°C±0.2±0.5%FS
Gain-Error Tempco±25p p mFS /° C
Span Linearity±2±4µA
Power-Supply RejectionPSRVEXT = 7V to 36V4µA/V
Signal Path Noise10pF to AGND on 4-20OUT2.0µARMS
4–20mA Current LimitLimited to 12.5 x VREF / 1.28kΩ20mA
TIMING CHARACTERISTICS (Notes 11, 12, Figure 8)

SCLK Operating FrequencyfSCLKDVDD = 2.7V04.2MHz
SCLK Pulse-Width HightCH100ns
SCLK Pulse-Width LowtCL100ns
DIN-to-SCLK SetuptDS50ns
DIN-to-SCLK HoldtDH0ns
CS Fall to SCLK Rise SetuptCSS50ns
SCLK Rise to CS Rise HoldtCSH0ns
SCLK Fall to DOUT ValidtDOCLOAD = 50pF, Figures 11, 12120ns
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