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MAX8887EZK15+ ,Low-Dropout, 300mA Linear Regulators in SOT23ELECTRICAL CHARACTERISTICS(V = V + 1V, SHDN = IN, T = -40°C to +85°C, unless otherwise noted.) (Not ..

MAX4840AEXT+T
Overvoltage-Protection Controllers with Status Flag
General Description
The MAX4838A/MAX4840A/MAX4842A are overvoltage-
protection ICs that protect low-voltage systems against
voltages of up to +28V. If the input voltage exceeds the
overvoltage trip level, the MAX4838A/MAX4840A/
MAX4842A turn off the low-cost external n-channel
FET(s) to prevent damage to the protected components.
An internal charge pump eliminates the need for external
capacitors and drives the FET gate for a simple,
robust solution.
The MAX4838A has a 7.4V overvoltage threshold, and
the MAX4840A has a 5.8V overvoltage threshold. The
MAX4842A has a 4.7V overvoltage threshold. The
MAX4838A/MAX4840A have an undervoltage-lockout
(UVLO) threshold of 3.25V, while the MAX4842A has a
UVLO of 2.5V. In addition to the single FET configura-
tion, the devices can be configured with back-to-back
external FETs to prevent currents from being back-dri-
ven into the adapter.
On power-up, the device waits for 50ms before driving
GATE high. FLAGis held low for an additional 50ms
after GATE goes high before deasserting. The
MAX4838A/MAX4840A/MAX4842A have an open-drain
FLAGoutput. The FLAGoutput asserts immediately to
an overvoltage fault.
Additional features include a ±15kV (HBM) ESD-pro-
tected input (when bypassed with a 1µF capacitor) and
a shutdown pin (EN) to turn off the device.
All devices are offered in a small 6-pin SC70 and 6-pin
1.5mm x 1.0mm µDFN packages and are specified
over the -40°C to +85°C extended temperature range.
Applications
Cell Phones
Digital Still Cameras
PDAs and Palmtop Devices
MP3 Players
FeaturesOvervoltage Protection Up to +28VPreset 7.4V, 5.8V, or 4.7V Overvoltage Trip LevelDrives Low-Cost nMOS FETInternal 50ms Startup DelayInternal Charge PumpUndervoltage Lockout±15kV ESD-Protected InputVoltage Fault FLAGIndicator6-Pin SC70 and µDFN PackagesLead Free
MAX4838A/MAX4840A/MAX4842A
Overvoltage-Protection Controllers with
Status FLAG
MAX4838A
MAX4840A
MAX4842A
INPUT
+1.2V TO +28V
GATE
FLAG
GND
OUTPUT
VIO1μF
NOTE: EN AND PULLUP
RESISTOR
NMOS
Typical Operating Circuit
Ordering Information
19-3979; Rev 0; 2/06
Pin Configuration appears at end of data sheet.
PARTPIN-
PACKAGE
TOP
MARK
PKG
CODE
MAX4838AEXT+T6 SC70ACYX6S-1
MAX4838AELT+6 µDFNKUL611-1
MAX4840AEXT+T6 SC70ACZX6S-1
MAX4840AELT+6 µDFNKVL611-1
MAX4842AEXT+T6 SC70ADAX6S-1
MAX4842AELT+*6 µDFNKWL611-1
Selector Guide
PART
UVLO
THRESHOLD
(V)
TRIP
LEVEL
(V)
INPUT
FLAG
OUTPUT
MAX4838A3.257.4YesOpen-Drain
MAX4840A3.255.8YesOpen-Drain
MAX4842A2.504.7YesOpen-Drain
Note:All devices specified for the -40°C to +85°C extended
temperature range.
*Future product—contact factory for availability.
+Denotes lead-free package.
MAX4838A/MAX4840A/MAX4842A
Overvoltage-Protection Controllers with
Status FLAG
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
(VIN= +5V (MAX4838A/MAX4840A), VIN= +4V (MAX4842A), TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA
= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
IN to GND ..............................................................-0.3V to +30V
GATE to GND ........................................................-0.3V to +12V
EN, FLAGto GND ....................................................-0.3V to +6V
Continuous Power Dissipation (TA= +70°C)
6-Pin SC70 (derate 3.1mW/°C above +70°C) .............245mW
6-Pin µDFN (derate 2.1mW/°C above +70°C) ............477mW
Operating Temperature Range ..........................-40°C to +85°C
Junction Temperature ....................................................+150°C
Storage Temperature Range ............................-65°C to +150°C
Lead Temperature (soldering, 10s) ................................+300°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
Input Voltage RangeVIN1.228.0V
MAX4838A/MAX4840A3.03.253.5Undervoltage-Lockout ThresholdUVLOVIN fallingMAX4842A2.32.52.7V
Undervoltage-Lockout Hysteresis50mV
VIN risingMAX4838A7.07.47.8
VIN risingMAX4840A5.55.86.1Overvoltage Trip LevelOVLO
VIN risingMAX4842A4.44.75.0
MAX4838A100
MAX4840A80Overvoltage Trip Level Hysteresis
MAX4842A50
No load, EN = GND or 5V,
VIN = 5V (MAX4838A/MAX4840A)80200
IN Supply CurrentIIN
No load, EN = GND or 4.0V,
VIN = 4V (MAX4842A)75160
VIN = 2.9V (MAX4838A/MAX4840A)30UVLO Supply CurrentIUVLOVIN = 2.2V (MAX4842A)22µA
MAX4838A/MAX4840A910GATE VoltageVGATEIGATE sourcing 1µA
MAX4842A7.58.0
GATE Pulldown CurrentIPDVIN > VOVLO, VGATE = 5.5V27mA
1.2V ≤ VIN < UVLO,
ISINK = 50µA0.4
FLAG Output Low VoltageVOLFLAG asserted
VIN ≥ OVLO, ISINK =
1mA0.4
FLAG Output High LeakageIOHVFLAG = 5.5V, FLAG deasserted1µA
EN Input High VoltageVIH1.5V
EN Input Low VoltageVIL0.4V
EN Input LeakageILKGEN = GND or 5.5V1µA
MAX4838A/MAX4840A/MAX4842A
Overvoltage-Protection Controllers with
Status FLAG
ELECTRICAL CHARACTERISTICS (continued)
(VIN= +5V (MAX4838A/MAX4840A), VIN= +4V (MAX4842A), TA= -40°C to +85°C, unless otherwise noted. Typical values are at TA
= +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
TIMING
Startup DelaytSTARTVIN > VUVLO, VGATE > 0.3V, Figure 1205080ms
FLAG Blanking TimetBLANKVGATE > 0.3V, VFLAG > 2.4V, Figure 1205080ms
GATE Turn-On TimetGONGA TE = 0.3V to 8V ( M AX 4838A/M AX 4840A) ,GA TE = 0.3V to 6V ( M AX 4842A) ,GA TE = 1500p F, Fi g ur e 1ms
GATE Turn-Off TimetGOFF
VIN increasing from 5V to 8V at 3V/µs
(MAX4838A/MAX4840A), VIN increasing
from 4V to 6V at 3V/µs (MAX4842A),
VGATE = 0.3V, CGATE = 1500pF, Figure 2
620µs
FLAG Assertion DelaytFLAG
VIN increasing from 5V to 8V at 3V/µs
(MAX4838A/MAX4840A), VIN increasing
from 4V to 6V at 3V/µs (MAX4842A),
VFLAG = 0.4V, Figure 2
5.8µs
Initial Overvoltage Fault DelaytOVP
VIN increasing from 0 to 8V
(MAX4838A/MAX4840A), VIN increasing
from 0V to 6V (MAX4842A), IGATE = 80% of
IPD, Figure 3
1.5µs
Disable TimetDISV EN = 2.4V , V GA TE = 0.3V , Fi g ur e 42µs
SUPPLY CURRENT vs. INPUT VOLTAGE
MAX4838A toc01
INPUT VOLTAGE (V)
SUPPLY CURRENT (2015105
REVERSE CURRENT
vs. OUTPUT VOLTAGE
MAX4838A toc02
OUTPUT VOLTAGE (V)
REVERSE CURRENT (
SINGLE MOSFET
BACK-TO-BACK MOSFETS
MAX4838A/MAX4840A
GATE VOLTAGE vs. INPUT VOLTAGE
MAX4838A toc03
INPUT VOLTAGE (V)
GATE VOLTAGE (V)654
MAX4840AMAX4838A
Typical Operating Characteristics
(VIN= +5V (MAX4838A/MAX4840A), VIN= +4V (MAX4842A); Si9936DY external MOSFET in back-to-back configuration; TA= +25°C,
unless otherwise noted.)
Note 1:All parts are 100% tested at +25°C. Electrical limits across the full temperature range are guaranteed by design and
correlation.
MAX4838A/MAX4840A/MAX4842A
Overvoltage-Protection Controllers with
Status FLAGypical Operating Characteristics (continued)
(VIN= +5V (MAX4838A/MAX4840A), VIN= +4V (MAX4842A); Si9936DY external MOSFET in back-to-back configuration; TA= +25°C,
unless otherwise noted.)
MAX4842A
GATE VOLTAGE vs. INPUT VOLTAGE
MAX4838A toc04
INPUT VOLTAGE (V)
GATE VOLTAGE (V)651234
MAX4842A
GATE VOLTAGE vs. INPUT VOLTAGE
MAX4838A toc05
INPUT VOLTAGE (V)
GATE VOLTAGE (V)
IGATE = 0
IGATE = 4μA
IGATE = 8μA
MAX4838A/MAX4840A
POWER-UP RESPONSE
MAX4838A toc06
GATE
10V
OUT
FLAG
20ms/div
ROUT = ∞
COUT = 0
MAX4838A/MAX4840A
POWER-UP RESPONSE
MAX4838A toc07
20ms/div
FLAG
IIN
GATE
10V
ROUT = 5Ω
OVERVOLTAGE RESPONSE
MAX4838A toc10
400ns/div
GATE
IGATE
FLAG
40mA
10V
CGATE = 1500pF
POWER-UP OVERVOLTAGE RESPONSE
MAX4838A toc11
1μs/div
GATE
IGATE
FLAG
50mAGATE PULLED UP
TO IN WITH 100Ω
POWER-DOWN RESPONSE
MAX4838A toc12
10ms/div
GATE
OUT
FLAG
10V
RLOAD = 50Ω
RFLAG = 100kΩ TO +5V
MAX4842A
POWER-UP RESPONSE
MAX4838A toc08
20ms/div
FLAG
OUT
GATE
ROUT = ∞
COUT = 0
MAX4842A
POWER-UP RESPONSE
MAX4838A toc09
20ms/div
800mA
FLAG
IIN
GATE
ROUT = 5Ω
MAX4838A/MAX4840A/MAX4842A
Overvoltage-Protection Controllers with
Status FLAG
PINNAMEFUNCTION
1INInput. IN is both the power-supply input and the overvoltage sense input. Bypass IN to GND with
a 1µF capacitor or larger.GNDGroundFLAGFault Indication Output, Open-Drain, Active Low. FLAG is asserted low during undervoltage-
lockout and overvoltage-lockout conditions. FLAG is deasserted during normal operation.GATEGate-Drive Output. GATE is the output of an on-chip charge pump. When VUVLO < VIN < VOVLO,
GATE is driven high to turn on the external n-channel MOSFET(s).
5N.C.No Connection. Not internally connected for µDFN package. Connected to ground for SC70
6-pin package; connect to ground or leave unconnected.ENDevice Enable Input, Active Low. Drive EN low or connect to ground to allow normal device
operation. Drive EN high to turn off the external MOSFET.
Pin Description
VIN
VGATE
VUVLO
0.3V
tSTART
2.4V
tBLANK
8V (6V)
tGON
VFLAG
5V (4V)
( ) MAX4842A
Figure 1. Startup Timing Diagram
VIN
VGATE
VOVLO
0.3V
tGOFF
0.4V
tFLAG5V (4V)
8V (6V)
VFLAG
( ) MAX4842A
Figure 2. Shutdown Timing Diagram
VIN
IGATE
VOVLO
80%
tOVP
8V (6V)
( ) MAX4842A
Figure 3. Power-Up Overvoltage Timing Diagram
VGATE
0.3V
tDIS
1.5VVEN
Figure 4. Disable Timing Diagram
Timing Diagrams
MAX4838A/MAX4840A/MAX4842A
Overvoltage-Protection Controllers with
Status FLAG
Detailed Description
The MAX4838A/MAX4840A/MAX4842A provide up to
+28V overvoltage protection for low-voltage systems.
When the input voltage exceeds the overvoltage trip level,
the MAX4838A/MAX4840A/MAX4842A turn off a low-cost
external n-channel FET(s) to prevent damage to the pro-
tected components. An internal charge pump (Figure 5)
drives the FET gate for a simple, robust solution.
Undervoltage Lockout (UVLO)
The MAX4838A/MAX4840A have a fixed 3.25V typical
undervoltage-lockout level (UVLO) while the MAX4842A
has a 2.5V typical UVLO. When VINis less than the
UVLO, the GATE driver is held low and FLAGis asserted.
Overvoltage Lockout (OVLO)
The MAX4838A has a 7.4V typical overvoltage threshold
(OVLO), and the MAX4840A has a 5.8V typical overvolt-
age threshold. The MAX4842A has a 4.7V typical over-
voltage threshold. When VINis greater than OVLO, the
GATE driver is held low and FLAGis asserted.
FLAGOutput
The FLAGoutput is used to signal the host system
there is a fault with the input voltage. FLAGasserts
immediately to an overvoltage fault. FLAGis held low
for 50ms after GATE turns on before deasserting.
All devices have an open-drain FLAGoutput. Connect
a pullup resistor from FLAGto the logic I/O voltage of
the host system.Enable Inputis an active-low enable input. Drive ENlow or con-
nect to ground to enable normal device operation.
Drive ENhigh to force the external MOSFET(s) off. EN
does not override an OVLO or UVLO fault.
GATE Driver
An on-chip charge pump is used to drive GATE above
IN, allowing the use of low-cost n-channel MOSFETS.
The charge pump operates from the internal 5.5V
regulator.
The actual GATE output voltage tracks approximately
two times VINuntil VINexceeds 5.5V or the OVLO trip
level is exceeded, whichever comes first. The
MAX4838A has a 7.4V typical OVLO; therefore GATE
remains relatively constant at approximately 10.5V for
5.5V < VIN< 7.4V. The MAX4840A has a 5.8V typical
OVLO, but this can be as low as 5.5V. The MAX4840A
in practice may never actually achieve the full 10.5V
GATE output. The MAX4842A has a 4.7V (typ) OVLO,
and the GATE output voltage is 2x the input voltage.
The GATE output voltage as a function of input voltage
is shown in the Typical Operating Characteristics.
Device Operation
The MAX4838A/MAX4840A/MAX4842A have an on-
board state machine to control device operation. A
flowchart is shown in Figure 6. On initial power-up, if
VIN< UVLO or if VIN> OVLO, GATE is held at 0V, and
FLAGis low.
If UVLO < VIN< OVLO and ENis low, the device enters
startup after a 50ms internal delay. The internal charge
pump is enabled, and GATE begins to be driven above
VINby the internal charge pump. FLAGis held low dur-
ing startup until the FLAGblanking period expires, typi-
cally 50ms after the GATE starts going high. At this
point the device is in its on state.
At any time if VINdrops below UVLO, FLAGis driven
low and GATE is driven to ground.GATE
GND
5.5V
REGULATOR
2x CHARGE
PUMPGATE DRIVER
CONTROL
LOGIC AND TIMER
UVLO AND
OVLO
DETECTOR
FLAG
MAX4838A
MAX4840A
MAX4842A
Figure 5. Functional Diagram

Partno	Mfg	Dc	Qty	Available	Descript
MAX4840AEXT+T	MAXIM	N/a	1458	avai	Overvoltage-Protection Controllers with Status Flag