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MC10H105MELON SemiconductorN/a3730avaiTriple 2-3-2-Input OR/NOR Gate


MC10H105MEL ,Triple 2-3-2-Input OR/NOR GateELECTRICAL CHARACTERISTICS (V = –5.2 V ±5%) (See Note 1.)EE0° 25° 75°Symbol Characteristic Min Max ..
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MC10H105MEL
Triple 2-3-2-Input OR/NOR Gate
--The MC10H105 is a triple 2–3–2–input OR/NOR gate. This MECL
10H part is a functional/pinout duplication of the standard MECL 10K
family part, with 100% improvement in propagation delay, and no
increases in power–supply current. Propagation Delay, 1.0 ns Typical Power Dissipation 25 mW/Gate (same as MECL 10K) Improved Noise Margin 150 mV (Over Operating Voltage and
Temperature Range) Voltage Compensated MECL 10K–Compatible
LOGIC DIAGRAM
DIP
PIN ASSIGNMENT

VCC1
AOUT
AOUT
AIN
AIN
BOUT
BOUT
VEE
VCC2
COUT
COUT
CIN
CIN
BIN
BIN
BIN
VCC1 = PIN 1
VCC2 = PIN 16
VEE = PIN 8 15 14 2 7 610
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion Tables on page 18
of the ON Semiconductor MECL Data Book (DL122/D).
http://
ORDERING INFORMATION
MARKING
DIAGRAMS
= Assembly Location = Wafer Lot = Year = Work Week
CDIP–16
L SUFFIX
CASE 620
PDIP–16
P SUFFIX
CASE 648
PLCC–20
FN SUFFIX
CASE 775

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