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PC87417
LPC ServerI/O for Servers and Workstations
PC87413, PC87414, PC87416, PC87417 LPC ServerI/O for Servers and Workstations
PreliminaryNovember 2001
Rev 1.1
PC87413, PC87414, PC87416, PC87417
LPC ServerI/O for Servers and Workstations
General DescriptionThe National Semiconductor® PC8741x familyof LPC Serv-
erI/O devices (“PC8741x”) comprises highly integrated Ad-
vanced I/O products. The PC8741xis targetedfora wide
rangeof servers and workstations that use the Low Pin
Count (LPC) busfor the host interface and the serial AC-
CESS.busor SMBus®forthe embedded controller interface.
The PC8741x featuresan X-Bus extensionfor read and write
operations over the X-Busfor both LPC and ACCESS.bus
cycles. BootFlash andI/O devices canbe accessed over this
X-Bus.
Embedded controllers can accessthe PC8741x andits X-Bus
via the ACCESS.busor SMBus serial interface when VSB
exists, regardlessof the LPC bus state. Someof the
PC8741x logicaldevices canbe disabled,or their pins canbe
floated, under control of the VSB -powered serial bus.
The PC8741x providesaVSB -powered high-frequency clock
for on-chip peripherals andfor other VSB-powered platform
components.
The PC8741x’s extended wake-up support complements the
chipset’s ACPI controller andthe platform embedded control-
lers. The PC8741x can monitorthe Power and Sleep buttons
and controlthe power supplyof simple platforms that lackan
embedded controller. The System Wake-Up Control (SWC)
moduleis poweredby VSB and VBAT power supplies.It sup-
ports flexible wake-up and power-off request mechanismsin
any sleep state.It features Main and Standby power-on
elapsed-time counters.
The PC8741x also incorporatesa Floppy Disk Controller
(FDC), two serial ports (UARTs),a Keyboard and Mouse
Controller (KBC),a Real-Time Clock (RTC),a fully compliant
IEEE 1284 Parallel Port, General-Purpose Input/Output
(GPIO)fora totalof51 ports andan Interrupt Serializerfor
Parallel IRQs.
Outstanding Features LPC Interface, basedon Intel’s LPC Interface Specifi-
cation, Revision 1.0, September 29th, 1997 VSB -powered accessto modules through ACCESS.busor
SMBus (PC87413
and PC87417) X-Bus Extensionfor memory and I/O (PC87416
and
PC87417) PC01 Revision 0.5 and ACPI Revision 1.0b compliant ServerI/O modules: Parallel Port, FDC, two Serial Ports
(UARTs) anda Keyboard and Mouse Controller (KBC) Y2K-compliant RTC with 242 bytesof RAM 51 GPIO ports witha varietyof wake-up events Extremely low current consumptionin Battery Backup mode 128-pin PQFP package
Block DiagramIEEE 1284
Parallel Port
Floppy Disk
Controller
Floppy Drive
InterfaceInterface
LPC Bus
Interface
LPC
Interface
Serial
Serial
Interface
Serial
IRQ
Parallel Port
InterfaceDD
Serial
VBAT
Keyboard &
Mouse Controller
Keyboard
Interface
Mouse
Interface
ServerI/O
Clock
I/O
GPIO
SMI
X-Bus
ExtensionWake-Up Control
System
SCI &
Ports
VSB ACCESS.bus
Interface
X-Bus
Interface
Power
Control
Wake-Up
Events
RTC
32.768 KHz
Clock
Low-F
Clock
Internal Clocks
XIRQ Clock Serial
Data
High-F
Clock
Generator
PC87417(See page5for other PC8741x diagrams.)
Port 1
Serial
Port 2
PortsOn
Power
Timers
Device
Configuration
