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PCF8570P-PCF8570T
256 x 8-bit static low-voltage RAM with I2C-bus interface
Philips Semiconductors Product specification
256×
8-bit static low-voltage RAM with2 C-bus interface PCF8570
CONTENTS FEATURES APPLICATIONS GENERAL DESCRIPTION QUICK REFERENCE DATA ORDERING INFORMATION BLOCK DIAGRAM PINNING CHARACTERISTICS OF THE I2 C-BUS
8.1 Bit transfer
8.2 Start and stop conditions
8.3 System configuration
8.4 Acknowledge
8.5 I2 C-bus protocol LIMITING VALUES HANDLING DC CHARACTERISTICS AC CHARACTERISTICS APPLICATION INFORMATION
13.1 Application example
13.2 Slave address
13.3 Power-saving mode PACKAGE OUTLINES SOLDERING
15.1 Introduction
15.2 Through-hole mount packages
15.2.1 Soldering by dipping or by solder wave
15.2.2 Manual soldering
15.3 Surface mount packages
15.3.1 Reflow soldering
15.3.2 Wave soldering
15.3.3 Manual soldering
15.4 Suitability of IC packages for wave, reflow and
dipping soldering methods DEFINITIONS LIFE SUPPORT APPLICATIONS PURCHASE OF PHILIPS I2 C COMPONENTS
Philips Semiconductors Product specification
256× 8-bit static low-voltage RAM with2 C-bus interface PCF8570
FEATURES Operating supply voltage 2.5to 6.0V Low data retention voltage; minimum 1.0V Low standby current; maximum 15μA Power-saving mode; typical 50 nA Serial input/output bus (I2 C-bus) Address by 3 hardware address pins Automatic word address incrementing Available in DIP8 and SO8 packages.
APPLICATIONS Telephony: RAM expansion for stored numbers in repertory
dialling (e.g. PCD33xxA applications) General purpose RAM for applications requiring
extremely low current and low-voltage RAM retention,
such as battery or capacitor-backed. Radio, television and video cassette recorder: channel presets General purpose: RAM expansion for the microcontroller families
PCD33xxA, PCF84CxxxA, P80CLxxx and most other
microcontrollers.
GENERAL DESCRIPTIONThe PCF8570 is a low power static CMOS RAM,
organized as 256 words by 8-bits.
Addresses and data are transferred serially via a two-line
bidirectional bus (I2 C-bus). The built-in word address
register is incremented automatically after each written or
read data byte. Three address pins, A0, A1 and A2 are
used to define the hardware address, allowing the use of
up to 8 devices connected to the bus without additional
hardware.
QUICK REFERENCE DATA ORDERING INFORMATION
Philips Semiconductors Product specification
256× 8-bit static low-voltage RAM with2 C-bus interface PCF8570
BLOCK DIAGRAM PINNING
Philips Semiconductors Product specification
256× 8-bit static low-voltage RAM with2 C-bus interface PCF8570 CHARACTERISTICS OF THE I2C-BUS
The I2 C-bus is for bidirectional, two-line communication
between different ICs or modules. The two lines are a
serial data line (SDA) and a serial clock line (SCL). Both
lines must be connected to a positive supply via a pull-up
resistor. Data transfer may be initiated only when the bus
is not busy.
8.1 Bit transfer
One data bit is transferred during each clock pulse.
The data on the SDA line must remain stable during the
HIGH period of the clock pulse as changes in the data line
at this time will be interpreted as a control signal.
8.2 Start and stop conditions
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW transition of the data line, while the
clock is HIGH is defined as the start condition (S). A LOW-to-HIGH transition of the data line while the clock is HIGH is
defined as the stop condition (P).
Philips Semiconductors Product specification
256× 8-bit static low-voltage RAM with2 C-bus interface PCF8570
8.3 System configuration
A device generating a message is a ‘transmitter’, a device receiving a message is the ‘receiver’. The device that controls
the message is the ‘master’ and the devices which are controlled by the master are the ‘slaves’.
8.4 Acknowledge
The number of data bytes transferred between the start
and stop conditions from transmitter to receiver is
unlimited. Each byte of eight bits is followed by an
acknowledge bit. The acknowledge bit is a HIGH level
signal put on the bus by the transmitter during which time
the master generates an extra acknowledge related clock
pulse. A slave receiver which is addressed must generate
an acknowledge after the reception of each byte. Also a
master receiver must generate an acknowledge after the
reception of each byte that has been clocked out of the
slave transmitter.
The device that acknowledges must pull down the SDA
line during the acknowledge clock pulse, so that the SDA
line is stable LOW during the HIGH period of the
acknowledge related clock pulse (set-up and hold times
must be taken into consideration). A master receiver must
signal an end of data to the transmitter by not generating
an acknowledge on the last byte that has been clocked out
of the slave. In this event the transmitter must leave the
data line HIGH to enable the master to generate a stop
condition.
Philips Semiconductors Product specification
256× 8-bit static low-voltage RAM with2 C-bus interface PCF8570
8.5 I2C-bus protocol
Before any data is transmitted on the I2 C-bus, the device which should respond is addressed first. The addressing is
always carried out with the first byte transmitted after the start procedure. The I2 C-bus configuration for the different
PCF8570 WRITE and READ cycles is shown in Figs 7, 8 and9.
Philips Semiconductors Product specification
256× 8-bit static low-voltage RAM with2 C-bus interface PCF8570 LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134). HANDLING
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take precautions appropriate to handling MOS devices. Advice can be found in Data Handbook IC12 under
“Handling MOS Devices”.
Philips Semiconductors Product specification
256× 8-bit static low-voltage RAM with2 C-bus interface PCF8570 DC CHARACTERISTICS
VDD= 2.5to 6.0 V; VSS=0 V; Tamb= −40to +85 °C; unless otherwise specified.
Notes The Power-on reset circuit resets the I2 C-bus logic when VDD condition can be tested by sending the slave address and testing the acknowledge bit. If the input voltages are a diode voltage above or below the supply voltage VDD or VSS an input current will flow; this
current must not exceed ±0.5 mA.
Philips Semiconductors Product specification
256× 8-bit static low-voltage RAM with2 C-bus interface PCF8570 AC CHARACTERISTICS
All timing values are valid within the operating supply voltage and ambient temperature range and reference to VIL and
VIH with an input voltage swing of VSS to VDD.
Note A detailed description of the I2 C-bus specification, with applications, is given in brochure “The I2 C-bus and how to
use it”. This brochure may be ordered using the code 9398 393 40011.
