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PEF82912FV1.3 . |PEF82912FV13InfineonN/a1900avaiQ-SMINTI (2B1Q Second Gen. Modular IS...
PEF82912HV1.3 |PEF82912HV13INFINEONN/a120avaiQ-SMINTI (2B1Q Second Gen. Modular IS...


PEF82912FV1.3 . ,Q-SMINTI (2B1Q Second Gen. Modular IS...Data Sheet, DS 1, March 2001®Q-SMINT I2B1Q Second Gen. Modular ISDN NT (Intelligent)PEF 82912/82913 ..
PEF82912HV1.3 ,Q-SMINTI (2B1Q Second Gen. Modular IS...Data Sheet, DS 1, March 2001®Q-SMINT I2B1Q Second Gen. Modular ISDN NT (Intelligent)PEF 82912/82913 ..
PEMB1 ,PNP resistor-equipped transistors R1 = 22kOhm/R2 = 22kOhmLIMITING VALUESIn accordance with the Absolute Maximum Rating System (IEC 60134).SYMBOL PARAMETER C ..
PEMB13 ,PNP/PNP resistor-equipped transistors; R1 = 4.7 k惟, R2 = 47 k惟
PEMB18 ,PEMB18; PUMB18; PNP/PNP resistor-equipped transistors; R1 = 4.7 kOhm, R2 = 10 kOhmapplications1.4 Quick reference dataTable 2: Quick reference dataSymbol Parameter Conditions Min Ty ..
PEMB19 ,PNP/PNP resistor-equipped transistors; R1 = 22 kOhm, R2 = openapplications1.4 Quick reference dataTable 2: Quick reference dataSymbol Parameter Conditions Min Ty ..
PIC7516 , Semiconductor Devices, Silicon hybrid Switching Regulators High Reliability Types
PIC7516 , Semiconductor Devices, Silicon hybrid Switching Regulators High Reliability Types
PIMD2 ,NPN/PNP resistor-equipped transistors; R1 = 22 k惟, R2 = 22 k惟General descriptionNPN/PNP double Resistor-Equipped Transistors (RET) in Surface-Mounted Device (SM ..
PIMD3 ,PEMD3; PIMD3; PUMD3; NPN/PNP resistor-equipped transistors; R1 = 10 kOhm, R2 = 10 kOhmFeatures and benefits  100 mA output current capability Reduces component count Built-in bias re ..
PIMH9 ,R1 = 10 kOhm, R2 = 47 kOhmLIMITING VALUESIn accordance with the Absolute Maximum Rating System (IEC 60134).SYMBOL PARAMETER C ..
PIMN31 ,500 mA, 50 V NPN/NPN double resistor-equipped transistor; R1 = 1 kOhm, R2 = 10 kOhmApplicationsn Digital application in automotive and industrial segmentsn Switching loads1.4 Quick r ..


PEF82912FV1.3 .-PEF82912HV1.3
Q-SMINTI (2B1Q Second Gen. Modular IS...


Q-SMINT®I
2B1Q Second Gen. Modular ISDN NT
(Intelligent)

PEF 82912/82913 Version 1.3
PEF 82912/82913
Revision History:March 2001
DS 1
Previous Version:Preliminary Data Sheet 10.00
Table of ContentsPageOverview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.1References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2
1.2Features PEF 82912 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3Features PEF 82913 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.4Not Supported are ... . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.5Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.6Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.7Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1.7.1Specific Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
1.8System Integration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.1Microcontroller Interfaces . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
2.1.1Serial Control Interface (SCI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
2.1.1.1Programming Sequences . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2.1.2Parallel Microcontroller Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
2.1.3Microcontroller Clock Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
2.2Reset Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
2.3IOM-2 Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
2.3.1IOM‚-2 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
2.3.2IOM‚-2 Handler . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
2.3.2.1Controller Data Access (CDA) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
2.3.2.2Serial Data Strobe Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
2.3.3IOM‚-2 Monitor Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
2.3.3.1Handshake Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
2.3.3.2Error Treatment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
2.3.3.3MONITOR Channel Programming as a Master Device . . . . . . . . . . . 48
2.3.3.4MONITOR Channel Programming as a Slave Device . . . . . . . . . . . . 48
2.3.3.5Monitor Time-Out Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
2.3.3.6MONITOR Interrupt Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
2.3.4C/I Channel Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
2.3.5D-Channel Access Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
2.3.5.1Application Examples for D-Channel Access Control . . . . . . . . . . . . 52
2.3.5.2TIC Bus Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
2.3.5.3Stop/Go Bit Handling . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
2.3.5.4D-Channel Arbitration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
2.3.5.5State Machine of the D-Channel Arbiter . . . . . . . . . . . . . . . . . . . . . . 56
2.3.6Activation/Deactivation of IOM®-2 Interface . . . . . . . . . . . . . . . . . . . . . 59
2.4U-Transceiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
2.4.12B1Q Frame Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
2.4.2Maintenance Channel . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
2.4.2.1Reporting to the μC Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
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