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PESD5V0F1BLNXPN/a4400avaiFemtofarad bidirectional ESD protection diode
PESD5V0F1BLNXP/PHILIPSN/a10000avaiFemtofarad bidirectional ESD protection diode


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PESD5V0F1BL
Femtofarad bidirectional ESD protection diode
1. Product profile
1.1 General description

Femtofarad bidirectional ElectroStatic Discharge (ESD) protection diode in a leadless
ultra small SOD882 Surface-Mounted Device (SMD) plastic package designed to protect
one signal line from the damage caused by ESD and other transients. The combination of
extremely low capacitance, high ESD maximum rating and ultra small package makes the
device ideal for high-speed data line protection and antenna protection applications.
1.2 Features and benefits

1.3 Applications

1.4 Quick reference data

PESD5V0F1BL
Femtofarad bidirectional ESD protection diode
Rev. 3 — 24 October 2011 Product data sheet
Bidirectional ESD protection of one line  ESD protection up to10 kV Femtofarad capacitance: Cd= 400fF  IEC 61000-4-2; level4 (ESD) Low ESD clamping voltage: 30V 30 ns and  8kV AEC-Q101 qualified Very low leakage current: IRM <1nA 10/100/1000 Mbit/s Ethernet  Portable electronics FireWire  Communication systems High-speed data lines  Computers and peripherals Subscriber Identity Module (SIM) card
protection Audio and video equipment Cellular handsets and accessories  Antenna protection
Table 1. Quick reference data
Per device

VRWM reverse standoff voltage - - 5.5 V diode capacitance f=1 MHz; VR =0V - 0.4 0.55 pF
NXP Semiconductors PESD5V0F1BL
Femtofarad bidirectional ESD protection diode
2. Pinning information

3. Ordering information

4. Marking

5. Limiting values

[1] Non-repetitive current pulse 8/20 s exponential decay waveform according to IEC 61000-4-5.
Table 2. Pinning
Table 3. Ordering information

PESD5V0F1BL - leadless ultra small plastic package; 2 terminals;
body 1.0 0.6 0.5 mm
SOD882
Table 4. Marking codes

PESD5V0F1BL ZZ
Table 5. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).
Per device

IPP peak pulse current tp =8/20s [1] -2.5 A junction temperature - 125 C
Tamb ambient temperature 40 +125 C
Tstg storage temperature 55 +125 C
NXP Semiconductors PESD5V0F1BL
Femtofarad bidirectional ESD protection diode

[1] Device stressed with ten non-repetitive ESD pulses.
Table 6. ESD maximum ratings

Tamb =25 C unless otherwise specified.
Per device

VESD electrostatic discharge voltage IEC 61000-4-2
(contact discharge)
[1] -10 kV
MIL-STD-883
(human body model)
-10 kV
Table 7. ESD standards compliance
Per device

IEC 61000-4-2; level4 (ESD) >8kV (contact)
MIL-STD-883; class 3 (human body model) >4kV
NXP Semiconductors PESD5V0F1BL
Femtofarad bidirectional ESD protection diode
6. Characteristics

[1] Non-repetitive current pulse 8/20 s exponential decay waveform according to IEC 61000-4-5.
Table 8. Characteristics

Tamb =25 C unless otherwise specified.
Per device

VRWM reverse standoff
voltage 5.5 V
IRM reverse leakage current VRWM=5V - 1 100 nA
VBR breakdown voltage IR =1mA 6 8 10 V diode capacitance f=1 MHz; VR =0V - 0.4 0.55 pF
VCL clamping voltage [1]
IPP =1A - - 11 V
IPP =2.5A - - 15 V
rdif differential resistance IR =20mA - - 30 
NXP Semiconductors PESD5V0F1BL
Femtofarad bidirectional ESD protection diode

NXP Semiconductors PESD5V0F1BL
Femtofarad bidirectional ESD protection diode
7. Application information

PESD5V0F1BL is designed for the protection of one bidirectional data or signal line from
the damage caused by ESD and surge pulses. The device may be used on lines where
the signal polarities are both, positive and negative with respect to ground.
Circuit board layout and protection device placement

Circuit board layout is critical for the suppression of ESD, Electrical Fast Transient (EFT)
and surge transients. The following guidelines are recommended: Place the device as close to the input terminal or connector as possible. The path length between the device and the protected line should be minimized. Keep parallel signal paths to a minimum. Avoid running protected conductors in parallel with unprotected conductors. Minimize all Printed-Circuit Board (PCB) conductive loops including power and
ground loops. Minimize the length of the transient return path to ground. Avoid using shared transient return paths to a common ground point. Ground planes should be used whenever possible. For multilayer PCBs, use ground
vias.
8. Test information
8.1 Quality information

This product has been qualified in accordance with the Automotive Electronics Council
(AEC) standard Q101 - Stress test qualification for discrete semiconductors, and is
suitable for use in automotive applications.
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