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PH2520U
TrenchMOS (tm) ultra low level FET
PH2520U renchMOS™ ultra low level FET
Rev. 01 — 02 May 2003 Product dataM3D748
Product profile
1.1 DescriptionN-channel enhancement mode field-effect power transistorina plastic package using
TrenchMOS™ technology.
Product availability:
PH2520U in SOT669 (LFP AK).
1.2 Features
1.3 Applications
1.4 Quick reference data Pinning information Low thermal resistance � SO8 equivalent area footprint Low threshold voltage � Low on-state resistance. DC-to-DC converters � Switched-mode power supplies Portable appliances � Notebook computers. VDS≤20V � ID≤ 121A Ptot≤ 62.5W � RDSon≤ 2.5 mΩ
Table 1: Pinning - SOT669 (LFPAK), simplified outline and symbol1,2,3 source (s)
SOT669 (LFPAK) gate (g) mounting base;
connectedto drain(d)
Top view MBL286
MBB076
Philips Semiconductors PH2520U
TrenchMOS™ ultra low level FET Limiting values
Table 2: Limiting valuesIn accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage (DC) 25°C≤Tj≤ 150°C - 20 V
VGS gate-source voltage (DC) - ±10 V drain current (DC) Tmb =25 °C; VGS= 4.5V Figure2 and3 - 121 A
Tmb= 100 °C; VGS= 4.5V Figure2 -76 A
IDM peak drain current Tmb =25 °C; pulsed; tp≤10μs Figure3 - 360 A
Ptot total power dissipation Tmb =25°C Figure1 - 62.5 W
Tstg storage temperature −55 +150 °C junction temperature −55 +150 °C
Source-drain diode source (diode forward) current (DC) Tmb =25°C - 52 A
ISM peak source (diode forward) current Tmb =25 °C; pulsed; tp≤10μs - 150 A
Avalanche ruggednessEDS(AL)S non-repetitive drain-source
avalanche energy
unclamped inductive load; ID= 70.7A;= 0.1 ms; VDD=20 V; VGS =10V;
startingTj =25°C 250 mJ
Philips Semiconductors PH2520U
TrenchMOS™ ultra low level FET
Philips Semiconductors PH2520U
TrenchMOS™ ultra low level FET Thermal characteristics
4.1 Transient thermal impedance
Table 3: Thermal characteristicsRth(j-mb) thermal resistance from junction to mounting base Figure4 --2K/W
Philips Semiconductors PH2520U
TrenchMOS™ ultra low level FET Characteristics
Table 4: Characteristics =25 °C unless otherwise specified.
Static characteristicsV(BR)DSS drain-source breakdown voltage ID= 250 μA; VGS=0V 20 --V
VGS(th) gate-source threshold voltage ID=1 mA; VDS =VGS; Figure9 =25°C 0.45 0.7 - V= 150°C 0.25- - V
IDSS drain-source leakage current VDS =20V; VGS =0V =25°C - 0.06 1 μA= 150°C - - 500 μA
IGSS gate-source leakage current VGS= ±10 V; VDS=0V - 20 100 nA
RDSon drain-source on-state resistance VGS= 4.5 V; ID =25A; Figure7 and8 =25°C - 2.1 2.5 mΩ= 150°C - 3.6 4.3 mΩ
VGS= 2.5 V; ID =25A; Figure7 - 3 3.2 mΩ
Dynamic characteristicsQg(tot) total gate charge ID=50 A; VDD =10V; VGS= 4.5V; Figure13 -78 - nC
Qgs gate-source charge - 17 - nC
Qgd gate-drain (Miller) charge - 18 - nC
Ciss input capacitance VGS =0V; VDS=10 V; f=1 MHz; Figure11 -5850 -pF
Coss output capacitance - 1190- pF
Crss reverse transfer capacitance - 831 - pF
td(on) turn-on delay time VDD =10V; ID=25 A; VGS= 4.5 V; RG= 4.7Ω -34 - ns rise time - 240 - ns
td(off) turn-off delay time - 318 - ns fall time - 234 - ns
Source-drain diodeVSD source-drain (diode forward) voltageIS=25 A; VGS=0V - 0.85 1.2 V
trr reverse recovery time IS=20 A; dIS/dt= −100 A/μs; VDS =20V
VGS =0V
-65 - ns
Philips Semiconductors PH2520U
TrenchMOS™ ultra low level FET
