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PHB110NQ08TNXP/PHN/a10000avaiN-channel TrenchMOS standard level FET


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PHB110NQ08T
N-channel TrenchMOS standard level FET
PHB110NQ08T
N-channel TrenchMOS standard level FET
Rev. 02 — 12 October 2009 Product data sheet Product profile
1.1 General description

Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing, communications, consumer and industrial applications only.
1.2 Features and benefits
Low conduction losses due to low
on-state resistance Suitable for standard level gate drive
sources
1.3 Applications
DC-to-DC convertors General industrial applications Motors, lamps and solenoids Uninterruptible power supplies
1.4 Quick reference data
Table 1. Quick reference
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - - 75 V drain current Tmb =25°C; VGS =10V;
see Figure 1 and 3
--75 A
Ptot total power
dissipation
Tmb=25 °C; see Figure 2 - - 230 W
Dynamic characteristics

QGD gate-drain charge VGS =10V; ID =25A;
VDS =60V; Tj =25°C;
see Figure 11 48.2 - nC
Static characteristics

RDSon drain-source
on-state resistance
VGS =10V; ID =25A; =25 °C; see Figure 9 and 10
-7.7 9 mΩ
NXP Semiconductors PHB110NQ08T
N-channel TrenchMOS standard level FET Pinning information

[1] It is not possible to make a connection to pin 2. Ordering information Limiting values
Table 2. Pinning information
gate
SOT404 (D2PAK)
drain [1] source D mounting base; connected to
drain
Table 3. Ordering information

PHB110NQ08T D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads (one
lead cropped)
SOT404
Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - 75 V
VDGR drain-gate voltage Tj≥25 °C; Tj≤ 175 °C; RGS =20kΩ -75 V
VGS gate-source voltage -20 20 V drain current VGS =10V; Tmb= 100 °C; see Figure 1 -75 A
VGS =10V; Tmb =25°C; see Figure 1 and 3 -75 A
IDM peak drain current tp≤10 µs; pulsed; Tmb =25°C; see Figure 3 -440 A
Ptot total power dissipation Tmb =25°C; see Figure 2 -230 W
Tstg storage temperature -55 175 °C junction temperature -55 175 °C
Source-drain diode
source current Tmb =25°C - 75 A
ISM peak source current tp≤10 µs; pulsed; Tmb =25°C - 440 A
Avalanche ruggedness

EDS(AL)S non-repetitive
drain-source avalanche
energy
VGS =10V; Tj(init) =25°C; ID =75A; Vsup≤75V;
unclamped; tp= 0.15 ms; RGS =50Ω
-560 mJ
NXP Semiconductors PHB110NQ08T
N-channel TrenchMOS standard level FET
NXP Semiconductors PHB110NQ08T
N-channel TrenchMOS standard level FET Thermal characteristics

Table 5. Thermal characteristics

Rth(j-mb) thermal resistance from
junction to mounting base
see Figure 4 - - 0.65 K/W
Rth(j-a) thermal resistance from
junction to ambient
mounted on printed-circuit board;
minimum footprint; vertical in still air
-50 - K/W
NXP Semiconductors PHB110NQ08T
N-channel TrenchMOS standard level FET Characteristics
Table 6. Characteristics
Static characteristics

V(BR)DSS drain-source
breakdown voltage =250 µA; VGS =0V; Tj =-55°C 70 - - V =250 µA; VGS =0V; Tj =25°C 75 - - V
VGS(th) gate-source threshold
voltage =1mA; VDS = VGS; Tj= 175 °C;
see Figure 8 - V =1mA; VDS = VGS; Tj =-55 °C;
see Figure 8
--4.4 V =1mA; VDS = VGS; Tj =25°C;
see Figure 8
234 V
IDSS drain leakage current VDS =75V; VGS =0V; Tj=25°C --10 µA
VDS =75V; VGS =0V; Tj= 175°C - - 500 µA
IGSS gate leakage current VGS =20V; VDS =0V; Tj=25°C - 2 100 nA
VGS =-20 V; VDS =0V; Tj=25°C - 2 100 nA
RDSon drain-source on-state
resistance
VGS =10V; ID =25A; Tj= 175 °C;
see Figure 9 and 10 16.2 18.9 mΩ
VGS =10V; ID =25A; Tj =25°C;
see Figure 9 and 10
-7.7 9 mΩ
Dynamic characteristics

QG(tot) total gate charge ID =25A; VDS =60V; VGS =10V; =25°C; see Figure 11 113.1 - nC
QGS gate-source charge - 18.5 - nC
QGD gate-drain charge - 48.2 - nC
Ciss input capacitance VDS =25V; VGS=0 V; f=1 MHz; =25°C; see Figure 12 4860 - pF
Coss output capacitance - 840 - pF
Crss reverse transfer
capacitance 475 - pF
td(on) turn-on delay time VDS =30V; RL =1.2 Ω; VGS =10V;
RG(ext) =5.6 Ω; Tj =25°C
-35 - ns rise time - 107 - ns
td(off) turn-off delay time - 183 - ns fall time - 100 - ns
Source-drain diode

VSD source-drain voltage IS =25A; VGS =0V; Tj =25°C;
see Figure 13 0.82 1.2 V
trr reverse recovery time IS =20A; dIS/dt= -100 A/µs; VGS =0V;
VDS =25V; Tj =25°C
-75 - ns recovered charge - 270 - nC
NXP Semiconductors PHB110NQ08T
N-channel TrenchMOS standard level FET
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