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PHB18NQ10TNXPN/a4800avaiN-channel TrenchMOS standard level FET
PHB18NQ10TNXP/PHN/a10000avaiN-channel TrenchMOS standard level FET


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PHB18NQ10T
N-channel TrenchMOS standard level FET
Product profile1.1 General description
Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing, communications, consumer and industrial applications only.
1.2 Features and benefits
Higher operating power due to low
thermal resistance Low conduction losses due to low
on-state resistance Suitable for high frequency
applications due to fast switching
characteristics
1.3 Applications
DC-to-DC converters  Switched-mode power supplies
1.4 Quick reference data

PHB18NQ10T
N-channel TrenchMOS standard level FET
Rev. 02 — 17 December 2010 Product data sheet
Table 1. Quick reference data

VDS drain-source
voltage≥25 °C; Tj≤ 175°C - - 100 V drain current Tmb =25°C; VGS=10V --18 A
Ptot total power
dissipation
Tmb=25°C --79 W
Static characteristics

RDSon drain-source
on-state
resistance
VGS =10V; ID =9A; Tj=25°C - 80 90 mΩ
Dynamic characteristics

QGD gate-drain charge VGS =10V; ID =18A;
VDS =80 V; Tj =25°C -nC
NXP Semiconductors PHB18NQ10T
N-channel TrenchMOS standard level FET Pinning information

[1] It is not possible to make connection to pin 2. Ordering information
Table 2. Pinning information
Table 3. Ordering information

PHB18NQ10T D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads
(one lead cropped)
SOT404
NXP Semiconductors PHB18NQ10T
N-channel TrenchMOS standard level FET Limiting values

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - 100 V
VDGR drain-gate voltage Tj≥25 °C; Tj≤ 175 °C; RGS =20kΩ - 100 V
VGS gate-source voltage -20 20 V drain current VGS =10V; Tmb =100°C - 13 A
VGS =10V; Tmb =25°C - 18 A
IDM peak drain current pulsed; Tmb =25°C - 72 A
Ptot total power dissipation Tmb =25°C - 79 W
Tstg storage temperature -55 175 °C junction temperature -55 175 °C
Source-drain diode
source current Tmb =25°C - 18 A
ISM peak source current pulsed; Tmb =25°C - 72 A
Avalanche ruggedness

EDS(AL)S non-repetitive drain-source
avalanche energy
VGS =10V; Tj(init) =25°C; ID =11A;
Vsup≤25 V; unclamped; tp= 100 µs;
RGS =50Ω
-70 mJ
IAS non-repetitive avalanche
current
Vsup≤25 V; VGS =10 V; Tj(init) =25°C;
RGS =50 Ω; unclamped
-18 A
NXP Semiconductors PHB18NQ10T
N-channel TrenchMOS standard level FET Thermal characteristics

Table 5. Thermal characteristics

Rth(j-mb) thermal resistance from
junction to mounting base
--1.9 K/W
Rth(j-a) thermal resistance from
junction to ambient
mounted on printed-circuit board;
minimum footprint
-50 -K/W
NXP Semiconductors PHB18NQ10T
N-channel TrenchMOS standard level FET Characteristics

Table 6. Characteristics
Static characteristics

V(BR)DSS drain-source
breakdown voltage =0.25mA; VGS =0V; Tj= -55°C 89 - - V =0.25mA; VGS =0V; Tj=25°C 100 - - V
VGS(th) gate-source threshold
voltage =1mA; VDS =VGS; Tj= -55°C --6 V =1mA; VDS =VGS; Tj= 175°C 1 - - V =1mA; VDS =VGS; Tj=25°C 234V
IDSS drain leakage current VDS =100 V; VGS =0V; Tj= 175°C - - 500 µA
VDS =100 V; VGS =0V; Tj=25°C - 0.05 10 µA
IGSS gate leakage current VGS =10V; VDS =0V; Tj=25°C - 10 100 nA
VGS =-10 V; VDS =0V; Tj=25°C - 10 100 nA
RDSon drain-source on-state
resistance
VGS =10V; ID =9A; Tj= 175°C - - 243 mΩ
VGS =10V; ID =9A; Tj=25°C - 80 90 mΩ
Dynamic characteristics

QG(tot) total gate charge ID =18A; VDS =80V; VGS =10V; =25°C
-21 -nC
QGS gate-source charge - 4 - nC
QGD gate-drain charge - 8 - nC
Ciss input capacitance VDS =25V; VGS=0 V; f=1 MHz; =25°C 633 - pF
Coss output capacitance - 103 - pF
Crss reverse transfer
capacitance
-61 -pF
td(on) turn-on delay time VDS =50V; RL =2.7 Ω; VGS =10V;
RG(ext) =5.6 Ω; Tj =25°C -ns rise time - 36 - ns
td(off) turn-off delay time - 18 - ns fall time - 12 - ns internal drain
inductance
measured from tab to centre of die; =25°C
-3.5 -nH internal source
inductance
measured from source lead to source
bond pad; Tj =25°C
-7.5 -nH
Source-drain diode

VSD source-drain voltage IS =18A; VGS =0V; Tj=25°C - 0.92 1.2 V
trr reverse recovery time IS =18A; dIS/dt= -100 A/µs; VGS =0V;
VDS =25V; Tj =25°C
-55 -ns recovered charge - 135 - nC
NXP Semiconductors PHB18NQ10T
N-channel TrenchMOS standard level FET
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