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PHD20N06TPHIN/a300avaiN-channel TrenchMOS(tm) transistor
PHD20N06TNXPN/a25200avaiN-channel TrenchMOS(tm) transistor
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PHD20N06T
N-channel TrenchMOS(tm) transistor
PHD20N06T
N-channel TrenchMOS™ transistor
Rev. 01 — 22 February 2001 Product specification

M3D300 Description
N-channel enhancement mode field-effect power transistorina plastic package using
TrenchMOS™1 technology.
Product availability:
PHD20N06T in SOT428 (D-PAK). Features TrenchMOS™ technology Low on-state resistance Fast switching. Applications Switched mode power supplies DC to DC converters General purpose switch. Pinning information TrenchMOS is a trademark of Royal Philips Electronics.
Table 1: Pinning - SOT428 (D-PAK), simplified outline and symbol
gate (g)
SOT428 (D-PAK)
drain (d) source (s) drain (d)
MBK091Top view s
MBB076
Philips Semiconductors PHD20N06T
N-channel TrenchMOS™ transistor Quick reference data Limiting values

[1] IDM is limited by chip, not package.
Table 2: Quick reference data

VDS drain-source voltage (DC) − 55 V drain current (DC) Tmb =25 °C; VGS =10V − 18 A
Ptot total power dissipation Tmb =25°C − 51 W junction temperature − 175 °C
RDSon drain-source on-state resistance VGS=10 V; ID =10A =25 °C65 77 mΩ= 175°C − 154 mΩ
Table 3: Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage (DC) − 55 V
VDGR drain-gate voltage (DC) RGS =20kΩ− 55 V
VGS gate-source voltage (DC) −±20 V drain current (DC) Tmb =25 °C; VGS =10V; Figure2 and3 − 18 A
Tmb= 100 °C; VGS =10V; Figure2 − 13 A
IDM peak drain current Tmb =25 °C; pulsed; tp≤10 μs; Figure3 [1]− 73 A
Ptot total power dissipation Tmb =25 °C; Figure1 − 51 W
Tstg storage temperature −55 +175 °C operating junction temperature −55 +175 °C
Source-drain diode

IDR reverse drain current (DC) Tmb =25°C − 18 A
IDRM pulsed reverse drain current Tmb =25 °C; pulsed; tp≤10μs − 73 A
Avalanche ruggedness

WDSS non-repetitive avalanche energy unclamped inductive load; ID =6A;
VDS≤55 V; VGS=10 V; RGS =50Ω;
starting T j =25°C 36 mJ
Philips Semiconductors PHD20N06T
N-channel TrenchMOS™ transistor
Philips Semiconductors PHD20N06T
N-channel TrenchMOS™ transistor Thermal characteristics
7.1 Transient thermal impedance
Table 4: Thermal characteristics

Rth(j-a) thermal resistance from junction to ambient minimum footprint, FR4 board 71.4 K/W
Rth(j-mb) thermal resistance from junction to mounting
base
Figure4 2.9 K/W
Philips Semiconductors PHD20N06T
N-channel TrenchMOS™ transistor Characteristics
Table 5: Characteristics
=25 °C unless otherwise specified
Static characteristics

V(BR)DSS drain-source breakdown
voltage= 0.25 mA; VGS =0V =25 °C55 −− V= −55 °C50 −− V
VGS(th) gate-source threshold voltage ID=1 mA; VDS =VGS;
Figure9 =25°C 2 34V= 175 °C1 −− V= −55°C −− 4.4 V
IDSS drain-source leakage current VDS =55V; VGS =0V =25°C − 0.05 10 μA= 175°C −− 500 μA
IGSS gate-source leakage current VGS= ±20 V; VDS =0V − 2 100 nA
RDSon drain-source on-state
resistance
VGS=10 V; ID =10A;
Figure7 and8 =25°C − 65 77 mΩ= 175°C −− 154 mΩ
Dynamic characteristics

Qg(tot) total gate charge ID=25 A; VDD =44V;
VGS =10V; Figure14 11 − nC
Qgs gate-source charge − 3 − nC
Qgd gate-drain (Miller) charge − 6 − nC
Ciss input capacitance VGS =0V; VDS =25V;=1 MHz; Figure12 316 422 pF
Coss output capacitance − 92 110 pF
Crss reverse transfer capacitance − 64 87 pF
td(on) turn-on delay time VDD =30V; RL= 1.2Ω;
VGS=10 V; RG =10Ω; 10 − ns rise time − 50 − ns
td(off) turn-off delay time − 70 − ns fall time − 40 − ns internal drain inductance measured from drain lead
from packageto centreof die 2.5 − nH internal source inductance measured from source lead
from packageto source bond
pad 7.5 − nH
Philips Semiconductors PHD20N06T
N-channel TrenchMOS™ transistor
Source-drain diode

VSD source-drain (diode forward)
voltage=10 A; VGS =0V;
Figure15 0.85 1.2 V
trr reverse recovery time IS =20A;dIS/dt= −100 A/μs;
VGS= −10 V; VDS =30V 32 − ns recovered charge − 120 − nC
Table 5: Characteristics…continued
=25 °C unless otherwise specified
Philips Semiconductors PHD20N06T
N-channel TrenchMOS™ transistor
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