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Partno	Mfg	Dc	Qty	Available	Descript
PHP33NQ20T	PHILIPS	N/a	250	avai	N-channel TrenchMOS⑩ standard level FET
PHP33NQ20T	NXP/PH	N/a	10000	avai	N-channel TrenchMOS⑩ standard level FET

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PHP33NQ20T
N-channel TrenchMOS⑩ standard level FET
PHB33NQ20T
N-channel TrenchMOS standard level FET
Rev. 02 — 3 February 2009 Product data sheet Product profile
1.1 General description
Standard level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic
package using TrenchMOS technology. This product is designed and qualified for use in
computing, communications, consumer and industrial applications only.
1.2 Features and benefits Higher operating power due to low
thermal resistance Low conduction losses due to low
on-state resistance Simple gate drive required due to low
gate charge Suitable for high frequency
applications due to fast switching
characteristics
1.3 Applications DC-to-DC primary side switching
1.4 Quick reference data Table 1. Quick reference
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - - 200 V drain current Tmb =25°C; VGS =10V;
see Figure 1; see Figure 3 - 32.7 A
Ptot total power
dissipation
Tmb=25 °C; see Figure 2 - - 230 W
Dynamic characteristics
QGD gate-drain charge VGS =10V; ID =25A;
VDS= 100 V; Tj =25°C;
see Figure 11
-9.6 -nC
Static characteristics
RDSon drain-source
on-state resistance
VGS =10V; ID =15A; =25 °C; see Figure 9;
see Figure 10 6577mΩ
NXP Semiconductors PHB33NQ20T
N-channel TrenchMOS standard level FET Pinning information
[1] It is not possible to make a connection to pin 2. Ordering information Limiting values
Table 2. Pinning information gate
SOT404
(D2PAK) drain [1] source D mounting base; connected to
drain
Table 3. Ordering information
PHB33NQ20T D2PAK plastic single-ended surface-mounted package (D2PAK); 3 leads (one
lead cropped)
SOT404
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 175°C - 200 V
VDGR drain-gate voltage Tj≥25 °C; Tj≤ 175 °C; RGS =20kΩ -200 V
VGS gate-source voltage -20 20 V drain current VGS =10V; Tmb= 100 °C; see Figure 1 -23.1 A
VGS =10V; Tmb =25°C; see Figure 1; see Figure 3 -32.7 A
IDM peak drain current tp≤10 µs; pulsed; Tmb =25°C; see Figure 3 -65.4 A
Ptot total power dissipation Tmb =25°C; see Figure 2 -230 W
Tstg storage temperature -55 175 °C junction temperature -55 175 °C
Source-drain diode source current Tmb =25°C - 32.7 A
ISM peak source current tp≤10 µs; pulsed; Tmb =25°C - 65.4 A
Avalanches ruggedness
EDS(AL)S non-repetitive
drain-source avalanche
energy
VGS =10V; Tj(init) =25°C; ID =10.4A; Vsup≤ 200V;
unclamped; tp= 0.14 ms; RGS =50Ω
-190 mJ
NXP Semiconductors PHB33NQ20T
N-channel TrenchMOS standard level FET
NXP Semiconductors PHB33NQ20T
N-channel TrenchMOS standard level FET Thermal characteristics
Table 5. Thermal characteristics
Rth(j-a) thermal resistance from
junction to ambient
mounted on a printed circuit board;
minimum footprint; vertical in still air
-50 - K/W
Rth(j-mb) thermal resistance from
junction to mounting
base
see Figure 4 - - 0.65 K/W
NXP Semiconductors PHB33NQ20T
N-channel TrenchMOS standard level FET CharacteristicsTable 6. Characteristics
Static characteristics
V(BR)DSS drain-source
breakdown voltage =250 µA; VGS =0V; Tj =-55°C 180 - - V =250 µA; VGS =0V; Tj =25°C 200 - - V
VGS(th) gate-source threshold
voltage =1mA; VDS = VGS; Tj= 175 °C;
see Figure 7; see Figure 8 - V =1mA; VDS = VGS; Tj =25°C;
see Figure 7; see Figure 8
234 V =1mA; VDS = VGS; Tj =-55 °C;
see Figure 7; see Figure 8
--4.4 V
IDSS drain leakage current VDS =160 V; VGS =0V; Tj= 175°C - - 500 µA
VDS =160 V; VGS =0V; Tj=25°C --1 µA
IGSS gate leakage current VGS =20V; VDS =0V; Tj=25°C - 10 100 nA
VGS =-20 V; VDS =0V; Tj=25°C - 10 100 nA
RDSon drain-source on-state
resistance
VGS =10V; ID =15A; Tj =25°C;
see Figure 9; see Figure 10
-65 77 mΩ
VGS =10V; ID =15A; Tj= 175 °C;
see Figure 9; see Figure 10 182 215 mΩ
Dynamic characteristics
QG(tot) total gate charge ID =25A; VDS =100 V; VGS =10V; =25°C; see Figure 11 32.2 - nC
QGS gate-source charge - 6.5 - nC
QGD gate-drain charge - 9.6 - nC
Ciss input capacitance VDS =25V; VGS=0 V; f=1 MHz; =25°C; see Figure 12 1870 - pF
Coss output capacitance - 230 - pF
Crss reverse transfer
capacitance
-70 - pF
td(on) turn-on delay time VDS =100 V; RL =4 Ω; VGS =10V;
RG(ext) =6 Ω; Tj =25°C
-12 - ns rise time - 35 - ns
td(off) turn-off delay time - 43 - ns fall time - 45 - ns
Source-drain diode
VSD source-drain voltage IS =25A; VGS =0V; Tj =25°C;
see Figure 13 0.87 1.2 V
trr reverse recovery time IS =20A; dIS/dt= -100 A/µs; VGS =0V;
VDS =25V; Tj =25°C 150 - ns recovered charge - 645 - nC
NXP Semiconductors PHB33NQ20T
N-channel TrenchMOS standard level FET

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