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PHY1078-01QS-RR |PHY107801QSRRPHYWORKSN/a3000avai125Mbps to 2.5Gbps FTTx Burst-Mode Laser Driver/Postamplifier
PHY1078-01QT-RR |PHY107801QTRRMAXIMN/a2500avai125Mbps to 2.5Gbps FTTx Burst-Mode Laser Driver/Postamplifier


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PHY1078-01QS-RR-PHY1078-01QT-RR
125Mbps to 2.5Gbps FTTx Burst-Mode Laser Driver/Postamplifier
125Mbps – 2.5Gbps FTTx Burst Mode Laser Driver/Postamplifier
Features
• Burst-Mode common anode laser driver with up
to 80mA modulation and 90mA bias current • 7ns output switching in Burst Mode • Power saving mode with zero bias and
modulation current between bursts • Closed or open loop bias mode with
temperature lookup table • Temperature compensated modulation current • Limiting amplifier with programmable low pass
filter and output swing • Device settings stored in external 2k EEPROM
Applications
• GEPON • BPON
Description

The PHY1078-01 is a combined burst mode laser
driver and limiting amplifier for use within fiber
optic modules for FTTx applications. Used with the
PHY1095 or PHY1097 transimpedance amplifiers
and a low cost serial EEPROM it forms a complete
PON diplexer silicon solution.
The transmit block includes a high frequency
modulator and a bias current generator. The bias
current can be controlled either by a fast settling
APC loop or in open loop mode which uses a
temperature lookup table.
The receiver includes a limiting amplifier with
programmable bandwidth. A Signal Detect/Loss Of
Signal function is implemented using the input
signal modulation amplitude with user selectable
threshold and hysteresis.
Operating with a 3.3V supply and rated from -40 to
+95°C ambient, the PHY1078-01 is housed in a
32pin, 5x5mm, RoHS compliant, TQFN package.
Level
Detect
O/PI/P
I/P
I/PDriver
LOS DAC
RXIN+
RXIN-
LASER-
LASER+
BIAS
MPD
EEPROM_SCL
EEPROM_SDA
SCL
SDA
TX_DISABLE
TX_FAULT
TXIN+
TXIN-
TSENSE
BEN+
BEN-
RXOUT+
RXOUT-
SD/LOS
Modulation
DAC
Mean Power
Control Loop
Internal
Registers &
2-Wire I/F
Safety Logic
Temperature
Comp
LPF

32TQFN
EEPROM_SDA1
SDA
VSS_RXO
RXOUT-
RXOUT+
RREF
VDD_TXO
LASER-
VSS_TXO
VSS_TXO
VDD_TXO
BIAS
EEPROM_SCL
VDD_RXO
VDD_RXVSS_RX
RXIN-RXIN+SD/LOSTSENSE
TX_FAULT
TX_DISABLE
TXIN+
BEN+
MPD
LASER+
VDD_TX
SCL
VSS_RX
BEN-
VSS_IC
TXIN-
Figure 1 – Block diagram Figure 2 – Device pin out PHY1078-01
19-5685; Rev 8/12
A Maxim Integrated Products Brand
Contents
1. Ordering Information ................................................................................................................... 3
2. Pin Description ............................................................................................................................ 3
3. Key Specifications ....................................................................................................................... 5
3.1. Absolute Maximum Ratings ................................................................................................. 5
3.2. Continuous Ratings ............................................................................................................. 5
3.3. Receiver .............................................................................................................................. 5
3.4. Transmitter .......................................................................................................................... 7
3.5. 2-Wire Serial Interface ....................................................................................................... 10
4. Functional Description ............................................................................................................... 12
4.1. Overview ........................................................................................................................... 12
4.2. Receiver Features ............................................................................................................. 12
4.3. Transmitter features .......................................................................................................... 15
4.4. Laser Safety Features ....................................................................................................... 20
4.5. Temperature Measurement ............................................................................................... 23
5. Control Interface ........................................................................................................................ 24
5.1. Boot Sequence .................................................................................................................. 25
5.2. Main Control Loop ............................................................................................................. 27
5.3. 2-wire Serial Interface ....................................................................................................... 28
6. Register Map ............................................................................................................................. 30
7. Simplified Interface Models ....................................................................................................... 42
8. Applications Information ............................................................................................................ 44
8.1. PHY1078-01 in an ONU application .................................................................................. 44
8.2. Power Supply Connections ............................................................................................... 45
8.3. Burst Enable and TX Input connection options ................................................................. 46
8.4. Laser Connection – DC-Coupled ...................................................................................... 47
8.5. Mean Power Control Loop Startup Algorithm .................................................................... 48
9. Packaging ................................................................................................................................. 51
10. Contact Information ................................................................................................................... 53
1. Ordering Information
Part Number Description Package

PHY1078-01-QT-RR FTTx LASER driver and Post Amp TQFN32, 5mmx5mm in Tape and Reel
2. Pin Description
Pin No Name Direction Type Description
EEPROM_SDA I/O LVTTL EEPROM 2 wire serial interface data, internal 8kΩ pull up VDD_RXO Power Receiver output power supply VSS_RXO Ground Receiver output ground connection RXOUT- O/P CML Limiting amplifier serial data output RXOUT+ O/P CML Limiting amplifier serial data output SDA I/O LVTTL 2-wire serial interface data SCL I/O LVTTL 2-wire serial interface clock RREF Internal connection, leave open circuit TX_FAULT O/P
LVTTL
(Open
Collector)
Laser fail alarm (requires external pull up)
10 TX_DISABLE I/P LVTTL Laser enable / disable
11 TXIN+ I/P High Speed
Input Laser driver serial input, see section 7 for interfacing details
12 TXIN- I/P High Speed
Input Laser driver serial input, see section 7 for interfacing details
13 VSS_IC Internal connection, connect to ground
14 BEN+ I/P High Speed
Input Burst enable positive, see section 7 for interfacing details
15 BEN- I/P High Speed
Input Burst enable negative, see section 7 for interfacing details
16 MPD I/P Analog Monitor photodiode input
17 BIAS O/P Analog Laser bias current output
18 VDD_TX Power Driver power supply
19 VDD_TXO Power Driver output power supply
20 VSS_TXO Ground Driver output ground connection
21 LASER- O/P High speed
Output Laser driver serial output
22 LASER+ O/P High speed
Output Laser driver serial output
23 VSS_TXO Ground Driver output ground connection
24 VDD_TXO Power Driver output power supply
25 TSENSE I/P Analog External temperature component connection
Pin No Name Direction Type Description
26 SD/LOS O/P
LVTTL
(Open
Collector)
Signal Detect or Loss of signal output (requires external pull up). Polarity
selected by user
27 VSS_RX Ground Receiver ground connection
28 RXIN- I/P CML Limiting amplifier serial data input
29 RXIN+ I/P CML Limiting amplifier serial data input
30 VSS_RX Power Receiver ground connection
31 VDD_RX Power Receiver power supply
32 EEPROM_SCL O/P LVTTL EEPROM 2-wire serial interface clock, internal 8kΩ pull up
EP VSS_EP Ground Common ground / thermal pad
3. Key Specifications
3.1. Absolute Maximum Ratings
Parameter Conditions Min Typ Max Unit

Supply voltage -0.5V 6.5 V
Voltage on any signal pin -0.5
VDD
+
0.5V
Storage temperature 150 °C
Max junction temperature 140 °C
Max soldering temperature IPC/JEDEC J-STD-020C 260 °C
ESD Human Body Model JESD-22-A114-B 2 kV
Device not guaranteed to meet specifications, permanent damage may be incurred by operating beyond these limits.
3.2. Continuous Ratings
Parameter Conditions Min Typ Max Unit

Operating supply voltage Continuous operation 2.97 3.3 3.63 V
Current consumption Excluding bias & modulation current
at 20mA bias & 20mA modulation 110 130 mA
Operating temperature Case Temperature +110 °C
Ambient Still Air -40 25 +95 °C
3.3. Receiver
3.3.1. Receive Limiting Amplifier
Parameter Conditions Min Typ Max Unit

Input sensitivity 1.25Gbps, PRBS 27-1, BER=1x10-12 6 8 mVp-p
2.5Gbps, PRBS 231-1, BER=1x10-10 7 10 mVp-p
System sensitivity
1.25Gbps, PRBS 27-1, BER=1x10-12
With PHY1095 TIA
PD Responsivity = 0.8A/W,
PD Capacitance = 0.5pF, Er = 10dB -32 dBm
2.5Gbps, PRBS 231-1, BER=1x10-10
With PHY1097 TIA
PD Responsivity = 0.9A/W,
PD Capacitance = 0.5pF, Er = 10dB -29 dBm
Crosstalk sensitivity penalty Imod=20mA, separate TOSA and ROSA
Measured on Phyworks reference design 0.1 dB
Maximum differential input TJ within spec 1200 mVp-p
Input termination impedance Differential 80 100 120 Ω
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