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PSB4600FV1.2
PITA (PCI Interface for Telephony/Dat...
ICs for Communications
PCI Interface for Telephony/Data Applications
PITA
PSB 4600 Version 1.2
Preliminary Data Sheet12.98
DS 1
Edition 12.98
Published by Siemens AG,
HL SP,
Balanstraße 73,
81541 München
© Siemens AG 1998.
All Rights Reserved.
Attention please!
As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for
applications, processes and circuits implemented within components or assemblies.
The information describes the type of component and shall not be considered as assured characteristics.
Terms of delivery and rights to change design reserved.
Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Siemens Office, Semiconductor Group.
Siemens AG is an approved CECC manufacturer.
Packing
Please use the recycling operators known to you. We can also help you – get in touch with your nearest sales
office. By agreement we will take packing material back, if it is sorted. You must bear the costs of transport.
For packing material that is returned to us unsorted or which we are not obliged to accept, we shall have to invoice
you for any costs incurred.
Components used in life-support devices or systems must be expressly authorized for such purpose!
Critical components1 of the Semiconductor Group of Siemens AG, may only be used in life-support devices or
systems2 with the express written approval of the Semiconductor Group of Siemens AG.A critical component is a component used in a life-support device or system whose failure can reasonably be
expected to cause the failure of that life-support device or system, or to affect its safety or effectiveness of that
device or system.
PSB 4600
Organization of this Data Sheet
This Preliminary Data Sheet is divided into 13 chapters:Chapter1, Features
Describes the compliants, interfaces and the compatibilities of the PITA.Chapter2, Applications realized with the PITA
Describes the applications realized with the PITA.Chapter3, Construction of the PITA
Shows a block diagram and describes the interfaces and their functions.Chapter4, Communication with the PITA
Describes the different controllers, registers and the power management of the
PITA.Chapter5, Communication with external Components
Gives a general description of the interfaces and modes of the PITA.Chapter6, Configuration of the PITA
Describes the pinstrapping and pins used for pinstrapping during system reset.Chapter7, Pinning
Describes the pins, types of pins and the characteristics of the interfaces.Chapter8, Package Outlines
Describes the package outlines.Chapter9, Precautions
Describes electrical maximum ratings and electrical characteristics.Chapter10, Configuration Space Register of the PITA
Contains maps and descriptions of the PCI Configuration Space Registers of
the PITA.Chapter11, Internal Register of the PITA
Contains maps and descriptions of the Internal Registers of the PITA.Chapter12, Abbreviations
Describes abbreviations occuring in this data sheet.
PSB 4600
Important Notes about this Data Sheet

What’s New
The organization of the structure follows the guidelines of Information Mapping®.

What is Information Mapping®
This is a research based method for the
–analysis
–structurepresentation
of user-orientated manuals.

Major Changes
Instead of the used chapters with mono causal descriptions you now get all informationfor a scope under the corresponding heading.

The Intention
This Data Sheet is intended to beeasily surveyedincreasingly readablecustomized applicablepractice-orientatedoffering the quickest possible way to the required information.

PSB 4600Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1-1Applications realized with the PITA . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-1Construction of the PITA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-1Communication with the PITA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1
4.1PCI Configuration Space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-2
4.1.1Information about the PCI Configuration Space . . . . . . . . . . . . . . . . . .4-3
4.1.2Access to the PCI Configuration Space . . . . . . . . . . . . . . . . . . . . . . . . .4-6
4.1.3Base Address Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-7
4.1.4Other Registers of the PCI Configuration Space . . . . . . . . . . . . . . . . .4-11
4.2PCI Master Target Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-13
4.2.1Supported PCI Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-14
4.2.2Transaction Type Single Data Read . . . . . . . . . . . . . . . . . . . . . . . . . .4-16
4.2.3Transaction Type Single Data Write . . . . . . . . . . . . . . . . . . . . . . . . . .4-17
4.2.4Transaction Type Burst Read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-18
4.2.5Transaction Type Burst Write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-20
4.2.6Transaction Type Fast Back to Back . . . . . . . . . . . . . . . . . . . . . . . . . .4-22
4.3Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-24
4.3.1Information about the Power Management States . . . . . . . . . . . . . . .4-25
4.3.2Configuration Space Registers of the Power Management . . . . . . . . .4-28
4.4Interrupt Control Register - Retry Counter . . . . . . . . . . . . . . . . . . . . . . . .4-35Communication with external Components . . . . . . . . . . . . . . . . . . . . .5-1
5.1Serial DMA Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-2
5.1.1DMA Controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-4
5.1.2IOM-2 Mode 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-15
5.1.3IOM-2 Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-18
5.1.4IOM-2 Mode 3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-21
5.1.5IOM-2 Modes - Supplementary Description . . . . . . . . . . . . . . . . . . . . .5-24
5.1.6Single Modem Mode V2.1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-29
5.1.7Single Modem Mode ALIS V3.X . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-33
5.1.8Dual Modem/Modem+Voice Mode . . . . . . . . . . . . . . . . . . . . . . . . . . .5-42
5.1.9Loop Back Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-45
5.2Parallel Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-47
5.2.1ALE after System Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-50
5.2.2ALE after internal Software Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-51
5.2.3ALE after setting the Parallel Interface Mode Bit . . . . . . . . . . . . . . . . .5-52
5.2.4Non Multiplexed Mode (Write Transaction) . . . . . . . . . . . . . . . . . . . . .5-53
5.2.5Non Multiplexed Mode (Read Transaction) . . . . . . . . . . . . . . . . . . . . .5-54
5.2.6Multiplexed Mode (Write Transaction) . . . . . . . . . . . . . . . . . . . . . . . . .5-55
5.2.7Multiplexed Mode (Read Transaction) . . . . . . . . . . . . . . . . . . . . . . . . .5-56
5.2.8Transaction Disconnect with Target Abort . . . . . . . . . . . . . . . . . . . . . .5-57

Partno	Mfg	Dc	Qty	Available	Descript
PSB4600FV1.2 \|PSB4600FV12	INFINEON	N/a	33	avai	PITA (PCI Interface for Telephony/Dat...