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PSMN005-30K |PSMN00530KNXP/PHN/a10000avaiN-channel TrenchMOS SiliconMAX logic level FET


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PSMN005-30K
N-channel TrenchMOS SiliconMAX logic level FET
Product profile1.1 General description
SiliconMAX logic level N-channel enhancement mode Field-Effect Transistor (FET) in a
plastic package using TrenchMOS technology. This product is designed and qualified for
use in computing, communications, consumer and industrial applications only.
1.2 Features and benefits
Low conduction losses due to low
on-state resistance Suitable for high frequency
applications due to fast switching
characteristics
1.3 Applications
Computer motherboards DC-to-DC convertors Switched-mode power supplies
1.4 Quick reference data

PSMN005-30K
N-channel TrenchMOS SiliconMAX logic level FET
Rev. 2 — 22 December 2011 Product data sheet
Table 1. Quick reference data

VDS drain-source voltage Tj≥25 °C; Tj≤ 150°C --30 V drain current Tsp =80 °C; VGS =10 V; see Figure 1 --20 A
Ptot total power dissipation Tsp =80 °C; see Figure 2 --3.5 W
Static characteristics

RDSon drain-source on-state
resistance
VGS =10V; ID =15A; Tj =25°C;
see Figure 9; see Figure 10
-4.4 5.5 mΩ
Dynamic characteristics

QGD gate-drain charge VGS =4.5 V; ID =20A; VDS =15V; =25°C; see Figure 11
-14 -nC
NXP Semiconductors PSMN005-30K
N-channel TrenchMOS SiliconMAX logic level FET Pinning information
Ordering information Limiting values
Table 2. Pinning information
Table 3. Ordering information

PSMN005-30K SO8 plastic small outline package; 8 leads; body width 3.9 mm SOT96-1
Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage Tj≥25 °C; Tj≤ 150°C - 30 V
VGS gate-source voltage -20 20 V drain current Tsp =80 °C; VGS =10 V; see Figure 1 -20 A
IDM peak drain current Tsp=25 °C; pulsed; tp≤10µs;
see Figure 3
-60 A
Ptot total power dissipation Tsp =80 °C; see Figure 2 -3.5 W
Tstg storage temperature -55 150 °C junction temperature -55 150 °C
Source-drain diode
source current Tsp =80°C - 20 A
ISM peak source current Tsp=25 °C; pulsed; tp≤10µs - 60 A
NXP Semiconductors PSMN005-30K
N-channel TrenchMOS SiliconMAX logic level FET
NXP Semiconductors PSMN005-30K
N-channel TrenchMOS SiliconMAX logic level FET Thermal characteristics

Table 5. Thermal characteristics

Rth(j-sp) thermal resistance from
junction to solder point
mounted on a metal clad board;
see Figure 4 20 K/W
NXP Semiconductors PSMN005-30K
N-channel TrenchMOS SiliconMAX logic level FET Characteristics

Table 6. Characteristics
Static characteristics

V(BR)DSS drain-source
breakdown voltage =250 µA; VGS =0V; Tj=25°C 30 --V
VGS(th) gate-source threshold
voltage =1mA; VDS =VGS; Tj= 150 °C;
see Figure 8
0.5 --V =1mA; VDS =VGS; Tj =-55 °C;
see Figure 8
--3.4 V =1mA; VDS =VGS; Tj =25°C;
see Figure 8 3V
IDSS drain leakage current VDS =30V; VGS =0V; Tj=25°C --1 µA
VDS =30V; VGS =0V; Tj= 150°C --0.5 mA
IGSS gate leakage current VGS =20V; VDS =0V; Tj=25°C - - 100 nA
VGS =-20 V; VDS =0V; Tj=25°C - - 100 nA
RDSon drain-source on-state
resistance
VGS =4.5 V; ID =13A; Tj =25°C;
see Figure 9; see Figure 10
-6.6 8 mΩ
VGS =10V; ID =15A; Tj =25°C;
see Figure 9; see Figure 10
-4.4 5.5 mΩ
Dynamic characteristics

QG(tot) total gate charge ID =20A; VDS =15V; VGS =4.5V; =25°C; see Figure 11
-34 -nC
QGS gate-source charge - 15 - nC
QGD gate-drain charge - 14 - nC
Ciss input capacitance VDS =25V; VGS=0 V; f=1 MHz; =25°C; see Figure 12 3100 - pF
Coss output capacitance - 605 - pF
Crss reverse transfer
capacitance 405 - pF
td(on) turn-on delay time VDS =15V; RL =15 Ω; VGS =10V;
RG(ext) =6 Ω; Tj =25°C
-18 -ns rise time - 16 - ns
td(off) turn-off delay time - 65 - ns fall time - 45 - ns
gfs transfer conductance VDS =15V; ID =20A; Tj =25°C - 60 - S
Source-drain diode

VSD source-drain voltage IS =15A; VGS =0V; Tj =25°C;
see Figure 13 0.81 1.3 V
trr reverse recovery time IS =10A; dIS/dt= -100 A/µs; VGS =0V;
VDS =25V; Tj =25°C
-35 -ns recovered charge - 20 - nC
NXP Semiconductors PSMN005-30K
N-channel TrenchMOS SiliconMAX logic level FET
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