SN74ABT853DBLE ,8-Bit To 9-Bit Parity Bus TransceiversSN54ABT853, SN74ABT8538-BIT TO 9-BIT PARITY BUS TRANSCEIVERSSCBS198G − FEBRUARY 1991 − REVISED OCTO ..
SN74ABT8543DL ,Scan Test Devices With Octal Registered Bus TransceiversSN54ABT8543, SN74ABT8543 SCAN TEST DEVICES WITHOCTAL REGISTERED BUS TRANSCEIVERSSCBS120E – AUGUST 1 ..
SN74ABT861NT , 10-BIT TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74ABT863DWR ,9-Bit Bus Transceivers With 3-State OutputsSN54ABT863, SN74ABT863 9-BIT BUS TRANSCEIVERSWITH 3-STATE OUTPUTSSCBS201E – FEBRUARY 1991 – REVISED ..
SN74ABT863NT , 9-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74ABT8646DW ,Scan Test Devices With Octal Bus Transceivers And Registers SCBS123F − AUGUST 1992 − ..
SN74LS161ADR ,Synchronous 4-Bit Binary Counters
SN74LS161ADR2 , BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERSSN54/74LS160ASN54/74LS161ASN54/74LS162ABCD DECADE COUNTERS/SN54/74LS163A4-BIT BINARY COUNTERSThe LS ..
SN74LS161AML1 , BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERSSN54/74LS160ASN54/74LS161ASN54/74LS162ABCD DECADE COUNTERS/SN54/74LS163A4-BIT BINARY COUNTERSThe LS ..
SN74LS161AMR1 , BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERSSN54/74LS160ASN54/74LS161ASN54/74LS162ABCD DECADE COUNTERS/SN54/74LS163A4-BIT BINARY COUNTERSThe LS ..
SN74LS161AMR1 , BCD DECADE COUNTERS/ 4-BIT BINARY COUNTERSSN54/74LS160ASN54/74LS161ASN54/74LS162ABCD DECADE COUNTERS/SN54/74LS163A4-BIT BINARY COUNTERSThe LS ..
SN74LS161AN ,BCD decade counter/4-bit binary counterSN54/74LS160ASN54/74LS161ASN54/74LS162ABCD DECADE COUNTERS/SN54/74LS163A4-BIT BINARY COUNTERSThe LS ..
SN74ABT853DBLE
8-Bit To 9-Bit Parity Bus Transceivers
Latch-Up Performance Exceeds 500 mA PerJESD 17 Typical VOLP (Output Ground Bounce)< 1 V at VCC = 5 V, TA = 25°C High-Drive Outputs (−32-mA IOH, 64-mA IOL) High-Impedance State During Power Upand Power Down Parity-Error Flag With ParityGenerator/Checker Latch for Storage of Parity-Error Flag Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline(DB), and Thin Shrink Small-Outline (PW)Packages, Ceramic Chip Carriers (FK), Ceramic Flat (W) Package, and Plastic (NT)and Ceramic (JT) DIPsdescriptionThe ’ABT853 8-bit to 9-bit parity transceivers aredesigned for communication between data buses.When data is transmitted from the A bus to theB bus, a parity bit is generated. When data istransmitted from the B bus to the A bus with itscorresponding parity bit, the open-collectorparity-error (ERR) output indicates whether or notan error in the B data has occurred. Theoutput-enable (OEA and OEB) inputs can be usedto disable the device so that the buses areeffectively isolated. The ’ABT853 transceiversprovide true data at their outputs.
A 9-bit parity generator/checker generates a parity-odd (PARITY) output and monitors the parity of the I/O portswith the ERR flag. The parity-error output can be passed, sampled, stored, or cleared from the latch using thelatch-enable (LE) and clear (CLR) control inputs. When both OEA and OEB are low, data is transferred fromthe A bus to the B bus and inverted parity is generated. Inverted parity is a forced error condition that gives thedesigner more system diagnostic capability.
When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor;the minimum value of the resistor is determined by the current-sinking capability of the driver.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
ERR
CLR
GND
PARITY
OEB
ERR
CLR
GND
OEB
ARITYA1OEANC B1B2
SN54ABT853... FK PACKAGE(TOP VIEW) NC − No internal connection
