SN74HCT125DR ,Quadruple Bus Buffer Gates With 3-State Outputsmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74HCT125N ,Quadruple Bus Buffer Gates With 3-State Outputs/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SN74HCT138 ,3-Line To 8-Line Decoders/Demultiplexers/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SN74HCT138D ,3-Line To 8-Line Decoders/Demultiplexersmaximum ratings over operating free-air temperature range (unless otherwise noted)Supply voltage ra ..
SN74HCT138DR ,3-Line To 8-Line Decoders/Demultiplexersmaximum ratings” may cause permanent damage to the device. These are stress ratings only, andfuncti ..
SN74HCT138DRG4 ,3-Line To 8-Line Decoders/Demultiplexers 16-SOIC -40 to 85/sc/package.Please be aware that an important notice concerning availability, standard warranty, an ..
SNF431BS , Programmable Voltage Reference
SNJ5400J ,Quadruple 2-Input Positive-NAND GatesLogic Diagram, Each Gate (Positive Logic)AYB1An IMPORTANT NOTICE at the end of this data sheet addr ..
SNJ5400W ,Quadruple 2-Input Positive-NAND GatesPin Functions (continued)PINI/O DESCRIPTIONCDIP, CFP, SOIC, SO CFPNAME LCCCPDIP, SO, SSOP (SN74xx00 ..
SNJ5401J ,Quadruple 2-Input Positive-NAND Gates With Open-Collector Output
SNJ5401J ,Quadruple 2-Input Positive-NAND Gates With Open-Collector Output
SNJ5402J ,Quadruple 2-Input Positive-NOR Gates
SN74HCT125-SN74HCT125D-SN74HCT125DR-SN74HCT125N
Quadruple Bus Buffer Gates With 3-State Outputs
-
Typical tpd = 12 nsLines or Buffer Memory Address Registers
SN54HCT125 ...J OR W PACKAGE
SN74HCT125 ...D OR N PACKAGE
(TOP VIEW)3OE
2OE1OENC3A4OE
GND
SN54HCT125... FK PACKAGE
(TOP VIEW)NC – No internal connection
1OE
2OE
GND
VCC
4OE
3OE
description/ordering informationThese bus buffer gates feature independent line drivers with 3-state outputs. Each output is disabled when the
associated output-enable (OE) input is high.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION†Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
