STG3684QTR ,LOW VOLTAGE 0.5 OHM MAX DUAL SPD SWITCH WITH BREAK BEFORE MAKE FEATURESTG3684LOW VOLTAGE 0.5Ω MAX DUAL SPDT SWITCHWITH BREAK BEFORE MAKE FEATURE
STG3684QTR
LOW VOLTAGE 0.5 OHM MAX DUAL SPD SWITCH WITH BREAK BEFORE MAKE FEATURE
1/11May 2004 HIGH SPEED:
tPD= 0.3ns (TYP.)at VCC =3.0V
tPD= 0.4ns (TYP.)at VCC =2.3V ULTRA LOW POWER DISSIPATION:CC =0.2μA (MAX.)atTA= 85°C LOW "ON" RESISTANCE VIN =0V:ON =0.5Ω (MAX.TA= 25°C)atVCC =2.7ON =0.8Ω (MAX.TA= 25°C)atVCC =2.3V
RON =3.0Ω (MAX.TA= 25°C)at VCC =1.8V WIDE OPERATING VOLTAGE RANGE:CC (OPR)= 1.65Vto 4.3V SINGLE SUPPLY 4.3V TOLERANT AND 1.8V COMPATIBLE
THRESHOLD ON DIGITAL CONTROL INPUTVCC= 2.3to 3.0V LATCH-UP PERFORMANCE EXCEEDS
300mA (JESD 17)
DESCRIPTIONThe STG3684is an high-speed CMOS DUAL
ANALOG S.P.D.T. (Single Pole Dual Throw)
SWITCHor DUAL 2:1 Multiplexer/Demultiplexer
Bus Switch fabricated in silicon gateC2 MOS
technology.Itis designedto operate from 1.65Vto
4.3V, making this device ideal for portable
applications. offers very low ON-Resistance (<0.5Ω)atCC =3.0V. The nIN inputs are providedto control
the switches. The switches nS1 are ON (they are
connectedto common Ports Dn) when the nIN
inputis held high and OFF (high impedance state
exists between the two ports) when nINis held
low; the switches nS2 are ON (they are connected common Ports Dn) when the nIN inputis held
low and OFF (high impedance state exists
between the two ports) when INis held high.
Additional key features are fast switching speed,
Break Before Make Delay Time and Ultra Low
Power Consumption. All inputs and outputs are
equipped with protection circuits against static
discharge, giving them ESD immunity and
transient excess voltage. It’s availablein the
commercial temperature range in the QFN
package.
STG3684LOW VOLTAGE 0.5Ω MAX DUAL SPDT SWITCH
WITH BREAK BEFORE MAKE FEATURE
PIN CONNECTION
ORDER CODESRev.2
STG36842/11
Figure1: Input Equivalent Circuit Table1: Pin Description
Table2: Truth Table(*) High Impedance
Table3: Absolute Maximum RatingsAbsoluteMaximum Ratingsare those values beyond which damagetothe device mayoccur.Functional operation under these conditionsis
not implied.
(1) Derate above 70°C:by 18.5mW/°C.
Table4: Recommended Operating Conditions Truth Table guaranteed: 1.2Vto 4.3V.
STG36843/11
Table5: DC SpecificationsNote1: Guaranteedby design
Note2: ΔRON =RON(MAX) -RON(MIN).
Note3: Flatnessis definedasthe difference betweenthe maximum and minimum valueof on-resistanceas measured overthe specified
analog signal ranges.
STG36844/11
Table6: AC Electrical Characteristics(CL =35pF,RL =50Ω, tr=tf ≤ 5ns)
Table7: Analog Switch Characteristics(CL= 5pF,RL =50Ω,TA= 25°C)
Note1:Off Isolation= 20Log10(VD/VS),VD= output.VS= inputatoff switch
STG36845/11
Figure2: ON Resistance
Figure3: OFF Leakage
OFF Isolation
Figure4: Bandwidth
Figure5: ChannelTo Channel Crosstalk
STG36846/11
Table8: Test Circuit= 5/35pFor equivalent (includesjig and probe capacitance) =50Ωor equivalent =ZOUTof pulse generator (typically 50Ω)
Figure6: Break Before Make Time Delay
Figure7: Charge Injection(V GEN =0V,R GEN =0Ω,RL =1MΩ,CL =100pF)