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USBULC6-2F3
2-line IPAD", ultra low capacitance protection for high speed USB
April 2014 DocID12970 Rev 4 1/9
USBULC6-2F32-line Transil™, transient surge voltage suppressor (TVS)
ultralow capacitance protection for high speed USB
Datasheet - production data
Figure 1. Pin layout (bump side) and Device
configuration
Features Ultralow diode capacitance (1.5 pF max) Two data lines (D+ and D-) protected against
ESD Breakdown voltage VBR = 6.0 V min. Flip Chip, 400 µm pitch, lead-free Very low leakage current Very small PCB area RoHS compliant
Benefits Minimized impact on rise and fall times for
maximum data integrity Low PCB space occupation Higher reliability offered by monolithic
integration
Complies with the following standards IEC 61000-4-2 level 4 on external pins: 8 kV (contact discharge)
MIL STD 883G - Method 3015.7 25 kV (Human body model)
ApplicationThis device is designed to protect a high speed
USB port in wireless handsets (up to 480 Mb/s
according to USB 2.0 high speed specification).
DescriptionThe USBULC6-2F3 is a monolithic, application
specific discrete device dedicated to ESD
protection of high speed interfaces.
Its ultralow line capacitance secures a high level
of signal integrity without compromising the
protection of downstream sensitive chips against
the most stringently characterized ESD strikes.
TM: Transil is a trademark of STMicroelectronics.
Characteristics USBULC6-2F32/9 DocID12970 Rev 4
1 Characteristics
Figure 2. Electrical characteristics - definitions
Table 1. Absolute maximum ratings (Tamb = 25 °C)
Table 2. Electrical characteristics - values (T amb = 25 °C)
DocID12970 Rev 4 3/9
USBULC6-2F3 Characteristics
Figure 3. Eye diagram, board only (according to
USB high speed specification)
Figure 4. Eye diagram, board with
USBULC6-2F3 (according to USB 2.0 high
speed specification)
Figure 5. ESD response to IEC 61000-4-2
(+8 kV contact discharge)(1) Figure 6. ESD response to IEC 61000-4-2
(-8 kV contact discharge)(1) Test board connected to oscilloscope through 50 Ω cable and 20 dB + 6 dB attenuator. ESD generator return path
connected to PCB ground plane.
Figure 7. Junction capacitance versus
frequency (typical values)
Figure 8. Analog crosstalk measurement
Characteristics USBULC6-2F3 DocID12970 Rev 4
Figure 9. S21 (dB) attenuation measurement
Figure 10. Peak pulse power versus initial
junction temperature (maximum values, pulse
8/20 µs)
Figure 11. Peak pulse power versus exponential
pulse duration (maximum values)
Figure 12. Clamping voltage versus peak pulse
current (typical values, pulse 8/20 µs)
Figure 13. Leakage current versus junction
temperature (typical values)
DocID12970 Rev 4 5/9
USBULC6-2F3 Application information
2 Application information
Figure 14. Application diagram Ordering information scheme
Figure 15. Ordering information scheme
DocID12970 Rev 4ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: .
ECOPACK® is an ST trademark.
Figure 16. Package dimensions Figure 17. Footprint recommendations Figure 18. Marking
