XC9536 In-System Programmable CPLD The XC9536-15 is a CPLD (Complex Programmable Logic Device) manufactured by Xilinx. Below are its specifications, descriptions, and features based on factual information:
### **Specifications:**
- **Device Type:** CPLD (Complex Programmable Logic Device)
- **Family:** XC9500
- **Density:** 36 macrocells
- **Speed Grade:** -15 (15ns pin-to-pin delay)
- **Operating Voltage:** 5V
- **Number of I/Os:** Up to 34 (varies by package)
- **Package Options:**
- PLCC (Plastic Leaded Chip Carrier)
- VQFP (Very Thin Quad Flat Package)
- PC44 (44-pin PLCC)
- PC84 (84-pin PLCC)
- **Operating Temperature Range:** Commercial (0°C to +70°C) and Industrial (-40°C to +85°C)
- **Programmable Logic Blocks (PLBs):** 2
- **Max Frequency:** ~66.7 MHz (for -15 speed grade)
### **Descriptions:**
The XC9536-15 is a high-performance, low-power CPLD designed for general-purpose logic integration. It features in-system programmability (ISP) via IEEE 1149.1 (JTAG) interface, allowing for easy field upgrades. The device is suitable for glue logic, state machines, and bus interfacing applications.
### **Features:**
- **High Performance:** 15ns pin-to-pin delay.
- **In-System Programmable (ISP):** Supports JTAG boundary scan for programming and debugging.
- **Flexible I/O:** 5V tolerant I/O pins with 24mA drive capability.
- **Low Power:** Advanced CMOS FastFLASH technology for low standby and dynamic power.
- **Secure Design:** Built-in security bit prevents unauthorized access to configuration data.
- **Reliable:** 10,000 program/erase cycles endurance.
- **Wide Voltage Support:** 5V operation with 3.3V or 5V I/O compatibility.
- **Fast Pin Locking:** Advanced pin-locking architecture for easy design changes.
This information is based on Xilinx's official documentation for the XC9536-15 CPLD.
