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ESDLIN1524BJSTN/a18320avaiTransil™, transient voltage surge suppressor diode for ESD protection


ESDLIN1524BJ ,Transil™, transient voltage surge suppressor diode for ESD protectionPin configuration■ ISO 10605 (C = 150 pF, R = 330 – 30 kV (air discharge)– 30 kV (contact dischar ..
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ESDLIN1524BJ
Transil™, transient voltage surge suppressor diode for ESD protection
January 2013 Doc ID 12658 Rev 3 1/8
ESDLIN1524BJ
ransil™, transient voltage surge suppressor diode
for ESD protection
Datasheet  production data
Features
Max peak pulse power 160 W (8/20 µs) Asymmetrical bidirectional device Stand-off voltage: 15 and 24 V Low clamping factor VCL/VBR Low Leakage current AEC-Q101 qualified
Complies with the following standards:
ISO 10605 (C = 150 pF, R = 330  30 kV (air discharge) 30 kV (contact discharge) ISO 10605 (C = 330 pF, R = 330  30 kV (air discharge) 30 kV (contact discharge) ISO 7637-2 Pulse 3a: VS = -150 V Pulse 3b: VS = 100 V IEC 61000-4-5: IPP = 3 A (8/20 µs) HBM MIL STD 833, class 3 (> 4 kV)
Description

The ESDLIN1524BJ is an asymmetrical Transil
diode designed specifically for protecting one
automotive LIN bus line against electrostatic
discharge (ESD). The SOD323 is a very small
package which allows space saving on high
density printed circuit board.
Transil diodes provide high overvoltage protection
by clamping action and have instantaneous
response to transient overvoltages.
TM: Transil is a trademark of STMicroelectronics.
Figure 1. Pin configuration
Characteristics ESDLIN1524BJ
2/8 Doc ID 12658 Rev 3
1 Characteristics




Table 4. Electrical characteristics (values, T = 25° C)
Table 1. Absolute maximum ratings (limiting values) Tamb = 25° C
For a surge greater than maximum values, the diode will fail in short-circuit
Table 2. ESD maximum ratings
Table 3. Electrical characteristics (definitions)
Pulse test: tp < 50 ms VR = 0 V, F= 1 MHz VBR = T x (Tamb -25) x VBR(25° C)
ESDLIN1524BJ Characteristics
Doc ID 12658 Rev 3 3/8


Figure 6. Clamping test conditions and results
Figure 2. Relative variation of peak pulse
power versus initial junction
temperature
Figure 3. Peak pulse power versus
exponential pulse duration
Figure 4. Junction capacitance versus line
voltage (typical values), 15 V side
Figure 5. Junction capacitance versus line
voltage (typical values), 24 V side
Placement and PCB layout recommendations ESDLIN1524BJ
4/8 Doc ID 12658 Rev 3 Placement and PCB layout recommendations
Figure 7 illustrates recommendations for the placement and layout of the PCB for optimum
benefit of the ESDLIN1524BJ.
Figure 7. Placement and PCB layout recommendations Ordering information scheme
Figure 8. Ordering information scheme
ESDLIN1524BJ Package information
Doc ID 12658 Rev 3 5/8
4 Package information
Epoxy meets UL94, V0 Lead-free package
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOP ACK®
specifications, grade definitions and product status are available at: .
ECOPACK® is an ST trademark.

Figure 9. SOD323 footprint (dimensions in millimeters)
Table 5. SOD323 dimensions
Package information ESDLIN1524BJ Doc ID 12658 Rev 3
Figure 10. Tape dimensions
Figure 11. ESDLIN1524BJ-HQ reel dimensions
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