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IRFBC20SIRN/a4800avai600V Single N-Channel HEXFET Power MOSFET in a D2-Pak package


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IRFBC20S
600V Single N-Channel HEXFET Power MOSFET in a TO-262 package
PD-9.1014
International
TOR, Rectifier PRELIMINARY IRFBC20S/L
HEXFET® Power MOSFET
Surface Mount (IRFBC20S) D
Low-profile through-hole (IRFBC20L) VDss = 600V
Available in Tape & Reel (IRFBC20S)
Dynamic dv/dt Rating RDS(on) = 4.4f2
150°C Operating Temperature G
Fast Switching ID = 2.2A
Fully Avalanche Rated s
Description
Third generation HEXFETs from international Rectifier provide the designerwith the
best combination of fast switching, ruggedized device design, lowon-resistance and
cost-effectiveness.
The D2Pak is a surface mount power package capable ofthe accommodatingdie sizes
up to HEX-4. It provides the highest power capability and the lowest possible on-
resistance in any existing surface mount package. The D2Pak is suitable for high
current applications because of its low internal connection resistance and can
dissipate upt02.0Win atypical surface mountapplication. Thethrough-hole version D 2 Pak TO 262
(IRFBC20L) is availablefor low-profile applications.
Absolute Maximum Ratings
Parameter Max. Units
b @ Tc = 25°C Continuous Drain Current, VGS @ ION/S 2.2
ID @ Tc = 100°C Continuous Drain Current, Veg @ 10VC9 1.4 A
IDM Pulsed Drain Current C)6) 8.0
Pro @TA= 25°C Power Dissipation 3.1 W
PD @Tc = 25''C Power Dissipation 50 W
Linear Derating Factor 0.40 W/°C
I/ss Gate-to-Source Voltage i 20 V
EAS Single Pulse Avalanche Energy©S 84 m]
IAR Avalanche Current0) 2.2 A
EAR Repetitive Avalanche Energy© 5.0 rN
dv/dt Peak Diode Recovery dv/dt ©6) 3.0 V/ns
Tu Operating Junction and -55 to + 150
TSTG Storage Temperature Range ''C
Soldering Temperature, for 10 seconds 300 (1.6mm from case )
Thermal Resistance
Parameter Typ. Max. Units
ReJC Junction-to-Case - 2.5 o C /W
ReJA Junction-to-Ambient ( PCB Mounted/steady-state)" - 40
7/22/97
IRFBC20S/L
International
TOR Rectifier
Electrical Characteristics @ Tu = 25°C (unless otherwise specified)
Parameter Min. Typ. Max. Units Conditions
V(BR)DSS Drain-to-Source Breakdown Voltage 600 - - V VGS = 0V, ID = 250pA
AV(BR)Dss/ATJ Breakdown Voltage Temp. Coemcient - 0.88 - V/°C Reference to 25°C, ID =1mA©
RDs(on) Static Drain-to-Source On-Resistance - - 4.4 f2 VGs =10V, ID = 1.3A ©
Vngh) Gate Threshold Voltage 2.0 - 4.0 V VDs = l/ss, ID = 250pA
git Forward Transconductance 1.4 - - S Ws = 50V, ID = 1.3AS
loss Drain-to-Source Leakage Current - - 100 pA VDS = 600V, VGS = 0V
- - 500 VDs = 480V, VGS = 0V, Tu = 125°C
less Gate-to-Source Forward Leakage - - 100 n A VGs = 20V
Gate-to-Source Reverse Leakage - - -100 VGS = -20V
Qg Total Gate Charge - - 18 ID = 2.0A
Qgs Gate-to-Source Charge - - 3.0 nC VDs = 360V
di Gate-to-Drain ("Miller") Charge - - 8.9 VGS = 10V, See Fig. 6 and 13 ©©
tum) Turn-On Delay Time - 10 - VDD = 300V
tr Rise Time - 23 - ns ID = 2.0A
tam) Turn-Off Delay Time - 30 - R9 = 189
tr FaIITime - 25 - RD = 1500, See Fig. 10 (4D6)
Ls Internal Source Inductance - 7.5 - nH Between lead, .
and center of die contact
Ciss Input Capacitance - 350 - VGs = 0V
Coss Output Capacitance - 48 - pF VDs = 25V
Crss Reverse Transfer Capacitance - 8.6 - f = 1.0MHz, See Fig. 5S
Source-Drain Ratings and Characteristics
Parameter Min. Typ. Max. Units Conditions
Is Continuous Source Current MOSFET symbol D
(Body Diode) - - 2.2 A showing the [-,
ISM Pulsed Source Current integral reverse G Ex
(Body Diode) C) - - 8.0 p-n junction diode. S
VSD Diode Forward Voltage - - 1.6 V To = 25°C, Is = 2.2A, VGS = 0V co
trr Reverse Recovery Time - 290 580 ns To = 25°C, IF = 2.0A
er Reverse Recovery Charge - 0.67 1.3 pC di/dt = 100A/ps cos
ton Forward Turn-On Time Intrinsic tum-on time is negligible (turn-on is dominated by LS+LD)
Notes:
C) Repetitive rating; pulse width limited by
max. junction temperature. ( See fig. 11 )
© VDD =50V,
starting Tu = 25°C, L =31mH
Rs = 259, 'As = 2.2A. (See Figure 12)
© Iso S 2.2A,
Trf 150°C
** When mounted on 1" square PCB (FR-4 or G-10 Material ).
di/dt S 40A/ps, VDD f V(BR)DSS,
© Pulse width 3 300ps; duty cycle 3 2%.
G) Uses IRFBC20 data and test conditions
For recommended footprint and soldering techniques refer to application note #AN-994.
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