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ITA25B3STN/a4000avaiBIDIRECTIONAL TRANSIL ARRAY FOR DATALINE PROTECTION


ITA25B3 ,BIDIRECTIONAL TRANSIL ARRAY FOR DATALINE PROTECTIONFEATURESn HIGH SURGE CAPABILITY TRANSIL ARRAYI = 40 A (8/20μs)PPn PEAK PULSE POWER : 300 W (8/20μs) ..
ITA25B3RL ,BIDIRECTIONAL TRANSIL" ARRAY FOR DATALINE PROTECTIONFEATURES■ High surge capability Transil array:I = 40 A (8/20µs)PP■ Peak pulse power : 300 W (8/20µs ..
ITA6V1U1 ,TRANSIL ARRAY FOR DATALINE PROTECTIONFEATURESn HIGH SURGE CAPABILITY TRANSIL ARRAYI = 40 A (8/20μs)PPSO-8n PEAK PULSE POWER : 300 W (8/2 ..
ITA6V1U1RL ,TRANSIL" ARRAY FOR DATALINE PROTECTIONFEATURES■ High surge capability Transil array:I = 40 A (8/20µs)PPSO-8■ Peak pulse power : 300 W (8/ ..
ITA6V5B1 ,BIDIRECTIONAL TRANSIL ARRAY FOR DATALINE PROTECTIONFEATURESn HIGH SURGE CAPABILITY TRANSIL ARRAYI = 40 A (8/20μs)PPn PEAK PULSE POWER : 300 W (8/20μs) ..
ITA6V5B1RL ,BIDIRECTIONAL TRANSIL" ARRAY FOR DATALINE PROTECTIONFEATURES■ High surge capability Transil array:I = 40 A (8/20µs)PPTable 1: Order Codes■ Peak pulse p ..
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ITA25B3
BIDIRECTIONAL TRANSIL ARRAY FOR DATALINE PROTECTION
ITA6V5B3 / ITA10B3
ITA18B3 / ITA25B3

BIDIRECTIONAL TRANSIL TM ARRAY
FOR DATALINE PROTECTION
Differential data transmission lines protection: RS-232 RS-423 RS-422 RS-485
APPLICATIONS

Application Specific Discretes
A.S.D. TM
FUNCTIONAL DIAGRAM
HIGH SURGE CAPABILITY TRANSIL ARRAY
IPP=40A (8/20μs) PEAK PULSE POWER: 300W (8/20μs) SEPARATED INPUT-OUTPUT UP TO 9BIDIRECTIONAL TRANSIL FUNCTIONS LOW CLAMPING FACTOR (VCL /VBR)AT HIGH
CURRENT LEVEL LOW LEAKAGE CURRENT ESD PROTECTION UP TO 15kV
FEATURES
DESCRIPTION

Transil diode arrays provide high overvoltage
protectionby clamping action. Their instantaneous
responseto transient overvoltages makes them
particularly suited to protect voltage sensitive
devices suchas MOS Technology and low voltage
supplied IC’s.
The ITA series allies high surge capability against
energetic pulses with high voltage performance
against ESD.
The separated input/output configurationof the
device ensures improved protection against very
fast transient overvoltage like ESDby elimination the spikes induced by parasitic inductances
createdby external wiring.
IEC 1000-4-2: level4
IEC 1000-4-4: level4
IEC 1000-4-5: level2
MIL STD 883C- Method 3015-6: class3
(human body model)
COMPLIES WITH THE FOLLOWING STANDARDS:
ITA6V5B3 / ITA10B3 / ITA18B3 / ITA25B3
ELECTRICAL CHARACTERISTICS
(Tamb= 25°C)
ABSOLUTE MAXIMUM RATINGS
(Tamb= 25°C)
100s tpps
Note2
: BetweenI/Opin andground.
Note3
: Betweentwo input Pinsat0V Bias.
Preferred typesin bold.
Note1
: For surges greater than the specified maximum
value, theI/O will first presenta short-circuit and afteran
open circuit causedby the wire melting.
ITA6V5B3 / ITA10B3 / ITA18B3 /ITA25B3
P(W)
1E-03 1E-02 1E-01 1E+00 1E+01 1E+02
1E+01
1E+02
1E+03
1E+04P
Fig.1:
Typical peak pulse power versus
exponential pulse duration.
I(A)
1E-02 1E-01 1E+00 1E+01
1E+00
1E+01
1E+02
1E+03 DC
Fig.3:
Peak current IDC inducing open circuitof
the wire for one input/output versus pulse duration
(typical values).
Fig.4:
Junction capacitance versus reverse
applied voltage for one input/output (typical
values).
Fig. 2:
Clamping voltage versus peak pulse
current (exponential waveform 8/20 μs).
Fig.5:
Relative variationof leakage current
versus junction temperature
ITA6V5B3 / ITA10B3 / ITA18B3 / ITA25B3
This monolithic Transil Arrayis based on 10
unidirectionalTransils witha common cathode and
can be configuratedto offerupto9 bidirectional
functions. This imposesa maximum differential
voltage between2 input pins (see opposite table).
APPLICATION INFORMATION
ITA6V5B3 / ITA10B3 / ITA18B3 /ITA25B3
Design advantageof ITAxxxB3 used with 4-point structure.

The ITAxxxB3 has been designed witha 4-point structure (separated Input/output)in orderto efficiently
protect against disturbances with very high di/dt rates, suchas ESD.
The purposeof this 4-point structureisto eliminate the overvoltage introducedby the parasitic inductances the wiring (Ldi/dt).
Efficient protection depends not only on the component itself, but alsoon the circuit layout.The drawing
givenin figure shows the layoutto be usedin orderto take advantageof the 4-point structureof the
ITAxxxB3.
With this layout, each linetobe protected passes through the protection device. this way,it realizesan interface between the data line and the circuittobe protected, guaranteeingan
isolation betweenits inputs and outputs.
APPLICATION NOTICE
The4- point structure layout.
ORDER CODE
ITA6V5B3 / ITA10B3 / ITA18B3 / ITA25B3
MARKING

Information furnishedis believedtobe accurateandreliable. However,STMicroelectronicsassumesno responsibilityforthe consequencesof
useof suchinformation norfor anyinfringementof patents orother rightsof third parties whichmayresult fromits use.Nolicenseisgrantedby
implicationor otherwise underany patentor patent rightsof STMicroelectronics. Specifications mentionedinthis publicationare subjectto
change without notice. This publication supersedesand replacesall information previously supplied.
STMicroelectronics productsarenot authorizedforuseas critical componentsinlife support devicesor systems without express writtenap-
provalof STMicroelectronics.
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PACKAGE MECHANICAL DATA

SO-20 (Plastic)
Packaging:
standard packagingis tape and reel.
Weight
: 0.55g.
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