NMC9346N ,+6 to -0.3V; 1024-bit serial electrically erasable programmable memoryFeatures
The NM09346 Is a 1024-bit non-volatile, sequential I Designed for 40,000 erasé/write cy ..
NMC93C56 ,Electrically Erasable Programmable MemoriesBlock Diagram
NSTR0tm0N
REGISTER
ADDRESS
REGiSTER
DECODER
1 OF 128/256
EEPROM ARRAY
2 ..
NMD050505SC , Isolated 1W Twin Output DC/DC Converters
NMD050505SC , Isolated 1W Twin Output DC/DC Converters
NMD050505SC , Isolated 1W Twin Output DC/DC Converters
NMD050509S , Isolated 1W Twin Output DC-DC Converters
OM4068H ,LCD driver for low multiplex ratesGENERAL DESCRIPTION1⁄3The OM4068 is a low-power CMOS LCD driver, designed• 32 segment driversto dri ..
OM4068H/2 ,OM4068; LCD driver for low multiplex rates
OM4085T/F1 ,OM4085; Universal LCD driver for low multiplex rates
OM5193H ,Disk drive spindle and VCM with servo controller
OM5202FBB ,ROMless 8-bit microcontroller
OM5604 ,Multimedia radio tuner
NMC9346EN-NMC9346N
+6 to -0.3V; 1024-bit serial electrically erasable programmable memory
NATL SEMICOND (MEMORY)
such)"
:1 bsnues nnisaum. u 1::
National
Semiconductor
NMC9346 1024;?Bit Serial Electrically Erasable
Programmable Memory
General Description"
The NM09346 Is a 1024-bit non-volatile, sequential
EZPROM. fabricated using advanced N-channel EZPROM
technology. It Is an external memory with the 1024 bits of
readlwrite memory divided Into 64 registers of 16 bits each.
Each register can be serially mad or written by a COP400
controller. or a standard microprocessor. Written Informa-
tion ls stored In a floating gate cell until updated by an erase
and write cycle. The NM09346 has been designed for appli-
cations requiring up to 4 It 104 erase/write cycles per regis-
ter, A powendown mode ls provided by cs to reduce power
consumption by 75 percent.
Features
I Designed for 40, 000 erase/write cycles
I 10 year data retention
I Low cost
I Single supply read/write/erase operations (5Vd:10%)
I TTL compatible 7
I 64 x 16 serial read/write memory
I MICROWIRETM compatible serial vo
I Simple interfacing
I Low standby power '
I Non-volatile erase and write
I Reliable floating gato technology
I SelHImed programming cycle "
I Device status signal during programming
Block Diagram
“M ummun
t?pttim
'tit" mums
(64x13)
“TA IEGISIER
mmucnau
"'dl"dP
CDKIROL.
AND CLOCK
BEREMIOH
Pln Names
CS Chip Select
. SK Serial Data Clock 1
DI Serial Data Input
DO Serial Data Output
Power Supply
Ground
NP. No Connection
TLID/9205-1
BVSGOWN
NATL SEMICOND (MEMORY) BLE I) III 5501:1121: 00531162 l, Cl
NMCB346
Connection Diagrams 7 Jr3lrr1?rfp _ ' _
1' c, CC.'-, td, :.' 's, . _ .' _ a-pm
Dual-ln-Llne Package (N) . . SO Package (M8)
"c-n-l U $--Ytli1 .. . .. v. tls-t F-/ B-VOC-- -.-
"- t 1 -" SK" 2 -'. 7 "NC
tli-' 3 6 -lltt
_ a s -" _
tlo-- 4 7 5 -t)©
oo- l s -tlllt, - T_UDI9205-1
11/ Top. View _
DN205-2 .
1 See NS Package Number MDBA
Top Vlew Device Marking: 9346, 9346E
See NS Package Number NOSE . _
Ordering Information .' V _ . q cr
CtmtrmtrclalTemihRange _ ' l ExtGded Tettip.Rangs T _
(0°C to +rtt'tt) . ' t-4tr'Cto +35%)
Order Number - . - Order Number
NM09346N . . . _ NMC9346EN
NM09346M8 - NM09346EM8
Absolute Maxlmum Ratings Operating Conditions
It MllitarWAerospa0ts spelled devices are required, AmblentStorage Temperatures _ .
please contact the National Semiconductor Sales NMC9346 _ . '0‘0 to +70%
ottltm/Dlstrlbutors for availability and ttpetitions, NM09346E . -:40't? to +85%)
Voltage Relative to GND +6V to --0,tN Positive Supply Voltage . T _ 4.6V to 5.5V
AmblentSlorage Temperature -65''t? to + 125°C . . _ J - T
Lead Temperature . . .
(Soldering, 10 seconds) _ 300'C _
ESD tanng. 2000V
DC and AC Electrical Characteristics l/ct = si, i10% unless otherwise s'ptatsiiisti
Symbol Parameter _ Part Number Conditions Min Max Units
Vcc Operating Voltage NM69346. NM09346E _ 4.5 _ 5.5 V
l Operating Current _ NM09346 ' vcc=5.5v, cs= l, SK=1 . 12 mA
Mt Erase/Write Operating Current . Vco= 5.5V 12 mA
Operating Current NM09346E _ Var-- 5.5V, CS= 1, SK=1 14 . mA
Erase/Write Operating Current - _ Vcc=5.5V . 14 mA
------======m===t=lR_"-,
NATL SEMICOND (MEMORY)
D 5501:1135 UDEBHE! B D
T-46-13-27 --)
DC and AC Electrical Characteristics Vcty = 6V 110% unless otherwise Specified (Continued)
Symbol Parameter Part Number Condltlons Min Max - Unlls
lan Standby Current NM09346 Vcc= 5.5V, CS---0 3 mA
Standby Current F NM09346E Vcc == 5.5V. cs == 0 4 mA.
Input Voltage Levels NM09346. NM09346E 7
Ihr. --0.1 o. a v
VIH 2.0 Vac + 1 V
Output Voltage Levels NM09346. NM09346E _
VOL _ IQL=2.1 mA 0.4 V
VOH (OH = - 400 HA 2.4 V
In Input Leakage Current NM09346. NM09346E VIN= 5. IN 10 HA
li.O Output Leakage Current, NM09346, NM09346E Vour=5. w, CS---' 0 10 p.A
SK Frequency MM09346 0 250 _ kHz
LSKH SK High Time (Note 2) 1 ps
tsta. SK Low Tlme (Note 2) 1 p5
SK Frequency MMC9346E 0 kHz
SK High Time (Note 2) 1 250 ps
SK Low Time (Note 2) 1 #8
Inputs NM09346, NM09346E
toss CS 0.2 p.s
tCSH 0 #3
tas DI 0.4 #5
tom 7 0.4 p.s
Output NM09346, NM09346E cL=1oo pF _
bil DO Vo|_=0.8V, V0H=2.0V 2 p.s
' tE/w SelhTimed Program Cycle _ NM09346 10 ms
Sell-Timed Program Cycle NM09346E 10 ms
tes Min 08 Low Time (Note 3) NM09346. NM09346E 1 p.s
tw _ Rising Edge of OS to Status Valid NM09346. NM09346E CL=100 pF 1 us
ton ttrt FaIIIng Edge of OS to DO TRI-STATEG NM09346, NM09346E 0.4 'ttt
Note It Stress above lhose IlsIed under "Absolute Maximum Ratings" may cause permanent damage to ma device. This Is a stress rating only end furtctitmal
opecallon of lhe device at these or any other tt0miitlons above those Indicated It) the operational sections of the spetriiieation ls not Implied. Exposure to absolute
maximum rating amaiorts for extended periods may aihmt device reliability.
Hole 2: The SK frequency spec_. 'petit)" a minrmum SK ciock period ol 4 Fs, therefore in an SK clock cycle tsm + Den must be greater than or equal to 4 pa.
S. a. ll tset. - 1 " (hen the minimum m " a ps In order to mes) the SK frequency spaeil1cation,
Note t.. cs must be brought low for a minimum of 1 p3 (leg) belween tgtrnstseutNte instruclkm cycles,
'TNttout this table "M" refers to temperature range (-ti5'0 to +1290). nat packaga
QPSBOWN
NATL SENICOND (MEMORY)
NM09346
iu: I) I: ESULIEE uoeauau T I:
Functional Description
The NM09346 is a small peripheral memory Intended for
. use with COPSTM controllers and other nonvolatile memory
applications. The NMC9346 ls organized as slxty-four regis-
tam and each register is sixteen bits wide. The input and
output pins are controlled by separate serial formats. Seven
9-bit instructions can be executed. The instruction format
has a logical '1' as a start bit, two bits as an op code, and six
bits of address. The programming cycle ls selMimed, with
the data out (DO) pln Indicating the ready/busy status of the
chip. The on-chip programming voltage generator allows the .
user to use a single power supply Ncte). It only generates
high voltage during the programming modes (mite, erase,
chip erase. chip write) to prevent spurious programming dur.
Ing other modes. The DO pin is valid as data out during the
read mode, and If initiated, as , ready/busy status Indicator
during a programming cycle. During all other modes the DO
pin is in TRI-STATE, eliminating bus contention.
The mad Instruction Is the only Instruction which outputs
serial data on the DO pln. After a read instruction is re
ceived, the Instruction and address are decoded, followed
by data transfer from the memory register into a 16-blt sert-
al-out shift register. A dummy bit (logical '0') precedes the
16-bit data output string. Output data changes are initiated
by a low to high transition ot the SK clock.
ERASE/WRITE ENABLE AND DISABLE
When Vco is applied to the part it powers up in the program-
ming disable (EWDS) state, programming must be preceded
by a programming enable (EWEN) Instruction. Programming
remalns enabled until a programming disable (EWDS) in-
struction is executed or l/co ls removed from the part. The
programming enable instruction (EWEN) is needed to keep
the part In the enable state it the power supply (V00) noise
falls below operating range. The programming disable in-
stmction is provided to protect against accidental data dis.
turb. Execution ot a read Instruction is independent of both
EWEN and EWDS instructions.
ERASE (Note 4)
Like most tPPROMs, the register must fltst be erased (all
bits sat to logical '1') helore the register can be written (cer-
instruction Set. for NMC9346
" . pus-la-a;
tain bits set to logical 'ty). After an erase instruction (slnput, _
_ CS is dropped low. This falling edge of CS determines the _
start of the seif-timed programming cycle. If CS is brought
high subsequently (after observing the tcs specification),
the DO pin will indicate the readylbusy status of the chip.
The DO pln will go low if the chip is still programming. The
DO pin will go high when all bits of the register at the ad-
dress specified in the instruction have been set to a logical
'1'. The part is now ready for the next Instruction sequence.
WRITE (Note 4)
The write Instruction is followed by 16 bits of data to be
written Into the specified address. After the last bit of data
(D0) is put on the data in (DI) pin CS must be brought low
before the next rising edge of the SK clock. This tailing edge
of CS Initiates the seli-timed programming cycle. Like all
programming modes, DO indicates the ready/busy status of
the chip if GS is brought high after a minimum of t ws (tos),
DO=logical 'O' indicates that programming ls still in prog-
ress. DO=iogical '1' indicates that the register at the ad-
dress specified in the instruction has been written with the
data pattern specified in the instruction and the part is ready
for another instruction. The register to be written into must
' have been previously erased. V
CHIP ERASE (Note 4)
Entire chip erasing is provided for ease ot' programming.
Erasing the chip means that all registers in the memory ar-'
ray have each bit set to a logical '1'. Each register is then
ready for a write instruction. The chip erase cycle is Identical
to the erase cycle except for the different op code.
CHIP wane (Note 4)
All registers must be er_ased before a chip write operation.
The chip write cycle is identical to the write cycle except for
the different op code. All registers are simultaneously writ.
ten with the data pattern specified in the instruction. -
Nate 4: During a programming mode (write, erase. chip erase, chip mitel,
SK clock is only needed while the actual Instruction. l.e.. alert bit, op
code, address and data, Is belng input It can remain deactivated
during the selt-timed programing cycle and status check.
instruction SB Op Code Address Data comments
READ 1 10 A5A4A3A2A1AO . Read Register A5A4A3A2AIA0
WRITE, 1 01 A5A4A3A2A1Ao D15- DO Write Register A5A4A3A2A1AO
ERASE 1 11 A5A4A3A2AIA0 Erase Register A5A4A3A2AIA0
EWEN 1 00 11W Erase/Write Enable
EWDS 1 00 00mm Erase/Write Disable
ERAL 1 00 10mm Erase All Registers
WRAL 1 00 Ottooot DI 5- DO Write All Registers
NM09346 has , instructions as shown. Note that the M58 of any given lnstmction Is a "l" and Is viewed as a start bit In the
lnterlace sequence. The next 8 bits carry the on code and the 6.bit address for t 01 M, 18bit registers.
NATL SEMICONb (MEMORY) BLE D El 55011.25 unasuas' l :1
Timing Diagrams Tr4ii-13-27 ti
Synchronous Data Tlmlng a»
SK ---tso ' Isa
tms l "DIH tinc...,
0.4PS 0.4ps 0.4ps
hi. cs? .
"Poo A - th .
211.8 . 2pS
Von ' V
. , TUDIezos-4
'Thls Is the minimum SK period (5 us for NM09306M)
NMC9346
a ' "L_I'1_I'1_I'L_f'L_r'L_f'L_T'L.F_L_r'l_f'L_F'
cs/ . fanny}
“f“ n A5 u A: F _,l mm
m m _ M nn/M/xz'
HFSTAYE
a__f‘L_T'L_F7LJ'1_J'1_J‘1_J'1_F”L_r'l_r'L_F
c: f _ ‘L...__Jr crgmswus
giggli ' \ swam
ENABLE- H
DISMLE=IKI
TUD/szos-q
Tlming Diagrams (Continued)
_rr-4ti-li-27
NATL SEMICOND (NEHORY)
ECI asnLLaa'nueaueb 3 Cl
-------t--t=t=--a---e-",
NATL SEMICOND (MEMORY) 31E D III ESULLEE 005396? 5 III
- . 7 l 2
TimingPiNrp.rtyrj..thntinui/d) _. Trlyi-11-?7,, .7 . if E
ti r ' if,
, . "?iii:
'. .‘4 a E
_ 5 tt tt hh' s L
2-47 .
This datasheet has been :
www.ic-phoenix.com
Datasheets for electronic components.
National Semiconductor was acquired by Texas Instruments.
corp/docs/irwestor_relations/Pr_09_23_201 1_national_semiconductor.html
This file is the datasheet for the following electronic components:
NMC9346EM8 - product/nm09346em8?HQS=T|-nu|I-null-dscatalog-df-pf—nuII-wwe
NMC9346EN - product/nmc9346en?HQS=T|-nu|I-nulI-dscatalog-df-pf-null-wwe
NMC9346MB - product/nm09346mb?HQS=T|-nu|I—null-dscataIog-df-pf-null-wwe
NMC9346N - product/nmc9346n?HQS=T|-nu|I-nu|I-dscatalog-df-pf-nulI—wwe
