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Partno	Mfg	Dc	Qty	Available	Descript
PMGD400UN	PHILIPS	N/a	1240	avai	Dual N-channel uTrenchmos (tm) ultra low level FET
PMGD400UN	NXP/PH	N/a	10000	avai	Dual N-channel uTrenchmos (tm) ultra low level FET

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PMGD400UN
Dual N-channel uTrenchmos (tm) ultra low level FET
PMGD400UN
Dual N-channel μTrenchMOS™ ultra low level FET
Rev. 01 — 3 March 2004 Product dataMBD128 Product profile
1.1 Description
Dual N-channel enhancement mode field-effect transistor in a plastic package using
TrenchMOS™ technology.
1.2 Features
1.3 Applications
1.4 Quick reference data Pinning information Surface mounted package � Footprint 40% smaller than SOT23 Dual device � Fast switching Low on-state resistance � Low threshold voltage. Driver circuits � Switching in portable appliances. VDS≤30V � ID≤ 0.71A Ptot≤ 0.41W � RDSon≤ 480 mΩ.
Table 1: Pinning - SOT363 (SC-88), simplified outline and symbol source (s1)
SOT363 (SC-88) gate (g1) drain (d2) source (s2) gate (g2) drain (d1)
MSA370 3 4
Top view s2
MSD901
Philips Semiconductors PMGD400UN
Dual N-channel μTrenchMOS™ ultra low level FET Ordering information Limiting values
[1] Single device conducting.
Table 2: Ordering information
PMGD400UN SC-88 Plastic surface mounted package; 6 leads SOT363
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
VDS drain-source voltage (DC) 25°C≤Tj≤ 150°C - 30 V
VDGR drain-gate voltage (DC) 25°C≤Tj≤ 150 °C; RGS =20kΩ -30 V
VGS gate-source voltage (DC) - ±8V drain current (DC) Tsp =25 °C; VGS= 4.5V; Figure2 and3 [1]- 0.71 A
Tsp= 100 °C; VGS= 4.5V; Figure2 [1]- 0.45 A
IDM peak drain current Tsp =25 °C; pulsed; tp≤10 μs; Figure3 [1]- 1.42 A
Ptot total power dissipation Tsp =25 °C; Figure1 - 0.41 W
Tstg storage temperature −55 +150 °C junction temperature −55 +150 °C
Source-drain diode source (diode forward) current (DC) Tsp =25°C [1]- 0.34 A
ISM peak source (diode forward) current Tsp =25 °C; pulsed; tp≤10μs [1]- 0.69 A
Philips Semiconductors PMGD400UN
Dual N-channel μTrenchMOS™ ultra low level FET
Philips Semiconductors PMGD400UN
Dual N-channel μTrenchMOS™ ultra low level FET Thermal characteristics
5.1 Transient thermal impedance
Table 4: Thermal characteristics
Rth(j-sp) thermal resistance from junctionto solder point Figure4 - - 300 K/W
Philips Semiconductors PMGD400UN
Dual N-channel μTrenchMOS™ ultra low level FET Characteristics
Table 5: Characteristics =25 °C unless otherwise specified.
Static characteristics
V(BR)DSS drain-source breakdown voltage ID =1 μA; VGS =0V =25°C 30 --V= −55°C 27 --V
VGS(th) gate-source threshold voltage ID= 0.25 mA; VDS =VGS; Figure9 =25°C 0.45 0.7 1 V= 150°C 0.25 - - V= −55°C - - 1.2 V
IDSS drain-source leakage current VDS =30V; VGS =0V =25°C --1 μA= 150°C - - 100 μA
IGSS gate-source leakage current VGS=±8 V; VDS=0V - 10 100 nA
RDSon drain-source on-state resistance VGS= 4.5 V; ID= 0.2A; Figure7 and8 =25°C - 400 480 mΩ= 150°C - 660 816 mΩ
VGS= 2.5 V; ID= 0.1A; Figure7 and8 - 480 580 mΩ
VGS= 1.8 V; ID= 0.075A; Figure7 and8 - 580 830 mΩ
Dynamic characteristics
Qg(tot) total gate charge ID=1 A; VDD =15V; VGS= 4.5V;
Figure13 0.89 - nC
Qgs gate-source charge - 0.1 - nC
Qgd gate-drain (Miller) charge - 0.2 - nC
Ciss input capacitance VGS =0V; VDS=25 V; f=1 MHz;
Figure11
-43 - pF
Coss output capacitance - 7.7 - pF
Crss reverse transfer capacitance - 4.8 - pF
td(on) turn-on delay time VDD =15V; RL =15Ω;
VGS= 4.5V;RG =6Ω -ns rise time - 7.5 - ns
td(off) turn-off delay time - 18 - ns fall time - 4.5 - ns
Source-drain diode
VSD source-drain (diode forward) voltageIS= 0.3 A; VGS =0V; Figure12 - 0.76 1.2 V
Philips Semiconductors PMGD400UN
Dual N-channel μTrenchMOS™ ultra low level FET

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