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SN75LVDS386TIN/a3avai16-Channel LVDS Receiver
SN75LVDS386DGGTIN/a25avai16-Channel LVDS Receiver
SN75LVDS386DGGRTIN/a3321avai16-Channel LVDS Receiver


SN75LVDS386DGGR ,16-Channel LVDS ReceiverElectrical Characteristics....... 914.3 Related Links.. 298.6 Switching Characteristics.... 1014.4 ..
SN75LVDS386DGGR G4 , HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN75LVDS386DGGRG4 , HIGH-SPEED DIFFERENTIAL LINE RECEIVERS
SN75LVDS387DGG ,16-Channel LVDS Transmitterelectrical characteristics of low-Drivers Meet or Exceed the Requirements of ANSIvoltage differenti ..
SN75LVDS387DGGR ,16-Channel LVDS Transmitter SLLS362G–SEPTEMBER 1999–REVISED JANUARY 20165 Description (Continued)When disabled, the driver out ..
SN75LVDS388ADBT ,Octal LVDS Receiver SLLS394I–SEPTEMBER 1999–REVISED DECEMBER 20145 Description (Continued)Any of the differential rece ..
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SN75LVDS386-SN75LVDS386DGG-SN75LVDS386DGGR
16-Channel LVDS Receiver
Controller
Target
Controller
Target
Host Balanced InterconnectPower Power
DBn–3
DBn–2
DBn–1
DBn
DB2
DBn–3
DBn–2
DBn–1
DBn

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SN65LVDS386, SN65LVDS388A
SN65LVDS390, SN65LVDT386, SN65LVDT388A, SN65LVDT390, SN75LVDS386
SN75LVDS388A, SN75LVDS390, SN75LVDT386, SN75LVDT388A, SN75LVDT390

SLLS394I –SEPTEMBER 1999–REVISED DECEMBER 2014
SNx5LVDx3xx High-Speed Differential Line Receivers Features 3 Description

This familyof 4-, 8-,or 16-differential line receivers Four- ('390), Eight- ('388A),or Sixteen- ('386) Line (with optional integrated termination) implements theReceivers Meetor Exceed the electrical characteristics of low-voltage differentialRequirementsof ANSI TIA/EIA-644 Standard signaling (LVDS). This signaling technique lowers the• Integrated 110-Ω Line Termination Resistorson output voltage levels of 5-V differential standardLVDT Products levels (such as EIA/TIA-422B)to reduce the power,
increase the switching speeds, and allow operation• Designedfor Signaling Rates Upto 250 Mbps
witha 3-V supply rail.• SN65 Versions Bus-Terminal ESD ExceedskV Device Information(1) Operates Froma Single 3.3-V Supply Typical Propagation Delay Timeof 2.6ns Output Skew 100ps (Typical) Part-To-Part SkewIs Less Than1ns LVTTL Levels Are 5-V Tolerant Open-Circuit Fail Safe Flow-Through Pinout• Packagedin Thin Shrink Small-Outline
Package With 20-mil Terminal Pitch2 Applications Wireless Infrastructure• Telecom Infrastructure• Printer
(1) Forall available packages, see the orderable addendumat
the endofthe data sheet.
Typical Application Schematic
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