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STP5NB80STN/a20avaiN-CHANNEL 800V


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STP5NB80
N-CHANNEL 800V
STP5NB80
STP5NB80FP

N - CHANNEL 800V - 1.8Ω - 5A - TO-220/TO-220FP
PowerMESH MOSFET TYPICAL RDS(on) = 1.8 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED
DESCRIPTION

Using the latest high voltage MESH OVERLAY
process, STMicroelectronics has designed an
advanced family of power MOSFETs with
outstanding performances. The new patent
pending strip layout coupled with the Company’s
proprietary edge termination structure, gives the
lowest RDS(on) per area, exceptional avalanche
and dv/dt capabilities and unrivalled gate charge
and switching characteristics.
APPLICATIONS
HIGH CURRENT, HIGH SPEED SWITCHING SWITCH MODE POWER SUPPLIES (SMPS) DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
January 1999
ABSOLUTE MAXIMUM RATINGS

(*) Limited only by maximum temperature allowed (1) ISD ≤ 5A, di/dt ≤ 200 A/μs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
1/9
THERMAL DATA
AVALANCHE CHARACTERISTICS
ELECTRICAL CHARACTERISTICS (Tcase = 25
o C unless otherwise specified)
OFF
ON (∗)
DYNAMIC
STP5NB80/FP
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
SWITCHING OFF
SOURCE DRAIN DIODE
(∗) Pulsed: Pulse duration = 300 μs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Area for TO-220 Safe Operating Area for TO-220FP
STP5NB80/FP
Thermal Impedance for TO-220
Output Characteristics
Transconductance
Thermal Impedance for TO-220FP
Transfer Characteristics
Static Drain-source On Resistance
STP5NB80/FP
Gate Charge vs Gate-source Voltage
Normalized Gate Threshold Voltage vs
Temperature
Source-drain Diode Forward Characteristics
Capacitance Variations
Normalized On Resistance vs Temperature
STP5NB80/FP
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 2: Unclamped Inductive Waveform
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
STP5NB80/FP
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