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TDA7575PD
MULTIFUNCTION DUAL BRIDGE POWER AMPLIFIER WITH INTEGRATED DIGITAL DIAGNOSTICS
1/17
TDA7575PDMarch 2004 DMOS POWER OUTPUT NON-SWITCHING HI-EFFICIENCY SINGLE-CHANNEL 1Ω DRIVING CAPABILITY HIGH OUTPUT POWER CAPABILITY 2x28W/
4Ω @ 14.4V, 1KHZ, 10% THD, 2x40W/4Ω EIAJ MAX. OUTPUT POWER 2x75W/2Ω, 1x150W/1Ω SINGLE-CHANNEL 1Ω DRIVING CAPABILITY 84W UNDISTORTED POWER FULL I2 C BUS DRIVING WITH 4 ADDRESS
POSSIBILITIES: ST-BY, PLAY/MUTE, GAIN 12/26dB, FULL
DIGITAL DIAGNOSTIC POSSIBILITY TO DISABLE THE I2C DIFFERENTAL INPUTS FULL FAULT PROTECTION DC OFFSET DETECTION TWO INDEPENDENT SHORT CIRCUIT
PROTECTIONS CLIPPING DETECTOR PIN WITH
SELECTABLE THRESHOLD (2%/10%) ST-BY/MUTE PINS
DESCRIPTIONThe TDA7575PD is a new BCD technology DUAL
BRIDGE type of car radio amplifier in PowerSO36
package specially intended for car radio applications.
Thanks to the DMOS output stage the TDA7575PD
has a very low distortion allowing a clear powerful
sound. Among the features, its superior efficiency
performance coming from the internal exclusive
structure, makes it the most suitable device to simpli-
fy the thermal management in high power sets.The
dissipated output power under average listening con-
dition is in fact reduced up to 50% when compared to
the level provided by conventional class AB solu-
tions.
This device is equipped with a full diagnostic array
that communicates the status of each speaker
through the I2 C bus. The TDA7575PD has also the
possibility of driving loads down to 1Ω paralleling the
outputs into a single channel. It is also possible to dis-
able the I2 C and control the TDA7575PD by means of
the usual ST-BY and MUTE pins.
MULTIFUNCTION DUAL BRIDGE POWER AMPLIFIER
WITH INTEGRATED DIGITAL DIAGNOSTICS
BLOCK DIAGRAM
TDA7575PD
PIN CONNECTION (Top view)
ABSOLUTE MAXIMUM RATINGS
THERMAL DATA
3/17
TDA7575PD
ELECTRICAL CHARACTERISTCS: (VS=14.4V; f=1KHz; RL=4Ω; Tamb= 25°C unless otherwise specified)
TDA7575PD
ELECTRICAL CHARACTERISTCS: (continued)
5/17
TDA7575PD
ELECTRICAL CHARACTERISTCS: (continued)
TDA7575PD 2 C BUS INTERFACEData transmission from microprocessor to the TDA7575PD and viceversa takes place through the 2 wires I2 C BUS
interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected).
Data ValidityAs shown by fig. 1, the data on the SDA line must be stable during the high period of the clock.
The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW.
Start and Stop ConditionsAs shown by fig. 2 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH.
The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.
Byte FormatEvery byte transferred to the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit.
The MSB is transferred first.
AcknowledgeThe transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig.3). The
receiver** the acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so that
the SDAline is stable LOW during this clock pulse.
* Transmitter
=master (µP) when it writes an address to the TDA7575PD slave (TDA7575PD) when the µP reads a data byte from TDA7575PD
** Receiver slave (TDA7575PD) when the µP writes an address to the TDA7575PD
=master (µP) when it reads a data byte from TDA7575PD
ELECTRICAL CHARACTERISTCS: (continued)
7/17
TDA7575PD
Figure 1. Data Validity on the I2 CBUS
Figure 2. Timing Diagramon the I2 CBUS
Figure 3.
1 Ohm Capability SettingIt is possible to drive 1OHM load paralleling the outputs into a single channel.
In order to implement this feature, outputs are to be connected on the board as follows:
OUT1+ (PIN35 and PIN36) shorted to OUT2+ (PIN19 and PIN20)
OUT1- (PIN28 and PIN29) shorted to OUT2- (PIN26 and PIN27).
TDA7575PD It is recommended to minimize the impedance on the board between OUT2 and the load in order to minimize
THD distortion. It is also recommended to control the maximum mismatch impedance between VCC pins
(PIN21/PIN22 respect to PIN33/PIN34) and between PWGND pins (PIN24/PIN25 respect to PIN30/PIN31),
mismatch that must not exceed a value of 20 mOhm.
With 1OHM feature settled the active input is IN2 (PIN17 and PIN18), therefore IN1 pins should be let floating.
It is possible to set the load capability acting on 1OHM pin as follows:
1OHM PIN (PIN15) < 1.5V: two channels mode (for a minimum load of 2 OHM)
1OHM PIN (PIN15) > 2.5V: one channel mode (for 1 OHM load).
IT IS TO REMEMBER THAT 1 0HM FUNCTION IS A HARDWARE SELECTION.
Therefore it is recommended to leave 1OHM PIN floating or shorted to GND to set the two channels mode con-
figuration, or to short 1OHM PIN to VCC to set the one channel (1OHM) configuration.
2 C Abilitation SettingIt is possible to disable the I2 C interface by acting on I2 C PIN (PIN16) and control the TDA7575PD by means of
the usual ST-BY and MUTE pins. In order to activate or deactivate this feature, I2C PIN must be set as follows:
I2C PIN (PIN16) < 1.5V: I2 C bus interface deactivated
I2C PIN (PIN16) > 2.5V: I2 C bus interface activated
It is also possible to let I2 C PIN floating to deactivate the I2 C bus interface, or to short I2 C PIN to VCC to activate
it.
In particular:2 C ENABLED: I2 C pin (PIN16) > 2.5V STD MODE: Vstby (PIN5) > 3.5V, IB2(D1)=0 HE MODE: Vstby (PIN5) > 3.5V, IB2(D1)=1 PLAY MODE: Vmute (pin 4) >3.5V, IB1 (D2) = 1
The amplifier can always be switched off by putting Vstby to 0V, but with I2 C enabled it can be turn on only
through I2 C (with Vstby>3.5V). 2 C DISABLED: I2 C pin (PIN16) < 1.5V STD MODE: 3.5V < stby (PIN5) < 5 HE MODE: Vstby (PIN5) > 7V PLAY MODE: Vmute (pin 4) >3.5V
For both STD and HE MODE the play/mute mode can be set acting on Vmute pin.
9/17
TDA7575PD
SOFTWARE SPECIFICATIONSAll the functions of the TDA7575PD are activated by I2 C interface.
The bit 0 of the "ADDRESS BYTE" defines if the next bytes are write instruction (from µP to TDA7575PD) or
read instruction (from TDA7575PD to µP).
ADDRESS SELECTIONIf R/W = 0, the µP sends 2 "Instruction Bytes": IB1 and IB2.
IB1
IB2
