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TEA1552TNXPN/a950avaiHV start-up flyback controller for DCM or QR mode; 125 kHz f_osc(h); standby output signal


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TEA1552T
HV start-up flyback controller for DCM or QR mode; 125 kHz f_osc(h); standby output signal
1. General description
The GreenChipII is the second generation of green Switched Mode Power
Supply (SMPS) control ICs operating directly from the rectified universal mains. A high
level of integration leads to a cost effective power supply with a very low number of
external components.
The special built-in green functions allow the efficiency to be optimum at all power levels.
This holds for quasi-resonant operation at high power levels, as well as fixed frequency
operation with valley switching at medium power levels. At low power (standby) levels, the
system operates at reduced frequency and with valley detection.
The proprietary high voltage BCD800 process makes direct start-up possible from the
rectified mains voltage in an effective and green way. A second low voltage BICMOS IC is
used for accurate, high speed protection functions and control.
Highly efficient, reliable supplies can easily be designed using the GreenChipII control IC.
2. Features and benefits
Distinctive features: Universal mains supply operation (70V AC to 276V AC) High level of integration, giving a very low external component count. Green features: Valley or zero voltage switching for minimum switching losses Efficient quasi-resonant operation at high power levels Frequency reduction at low power standby for improved system efficiency (<3 W) Cycle skipping mode at very low loads. Pi< 300 mW at no-load operation for a
typical adapter application On-chip start-up current source Standby indication pin to indicate low output power consumption. Protection features: Safe restart mode for system fault conditions Continuous mode protection by means of demagnetization detection (zero
switch-on current) Accurate and adjustable overvoltage protection (latched) Short winding protection Undervoltage protection (foldback during overload) Overtemperature protection (latched)
TEA1552
HV start-up flyback controller for DCM or QR mode; 125 kHz
fosc(h); standby output signal
Rev. 3.1 — 21 June 2012 Product data sheet
NXP Semiconductors TEA1552
HV start-up flyback controller for DCM or QR mode
Low and adjustable overcurrent protection trip level Soft (re)start Mains voltage-dependent operation-enabling level General purpose input for lock protection.
3. Applications
3.1 Typical application

Typical application areas are adapters and chargers (e.g. for laptops, camcorders and
printers) and all applications that demand an efficient and cost-effective solution up to
250 W.
4. Ordering information
Table 1. Ordering information
TEA1552T SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1
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NXP Semiconductors TEA1552
HV start-up flyback controller for DCM or QR mode
5. Block diagram
NXP Semiconductors TEA1552
HV start-up flyback controller for DCM or QR mode
6. Pinning information
6.1 Pinning

6.2 Pin description

7. Functional description

The TEA1552 is the controller of a compact flyback converter, with the IC situated at the
primary side. An auxiliary winding of the transformer provides demagnetization detection
and powers the IC after start-up.
The TEA1552 operates in multi modes (see Figure 3).
Table 2. Pin description

VCOadj 1 VCO adjustment input
Isense 2 programmable current sense input
STDBY 3 standby indication or control output
DRIVER 4 gate driver output
HVS 5 high voltage safety spacer, not connected
HVS 6 high voltage safety spacer, not connected
DRAIN 7 drain of external MOS switch, input for start-up current and valley
sensing
VCC 8 supply voltage
n.c. 9 not connected
GND 10 ground
VCC(5V) 11 5 V output
LOCK 12 lock input
CTRL 13 control input
DEM 14 input from auxiliary winding for demagnetization timing, OVP and OPP
NXP Semiconductors TEA1552
HV start-up flyback controller for DCM or QR mode

The next converter stroke is started only after demagnetization of the transformer current
(zero current switching), while the drain voltage has reached the lowest voltage to prevent
switching losses (green function). The primary resonant circuit of primary inductance and
drain capacitor ensures this quasi-resonant operation. The design can be optimized in
such a way that zero voltage switching can be reached over almost the complete
universal mains range. o prevent very high frequency operation at lower loads, the quasi-resonant operation
changes smoothly in fixed frequency PWM control.
At very low power (standby) levels, the frequency is controlled down, via the VCO, to a
minimum frequency of approximately 25 kHz.
7.1 Start-up, mains enabling operation level and undervoltage lock-out
(see Figure 11 and 12)

Initially, the IC is self supplying from the rectified mains voltage via pin DRAIN. Supply
capacitor CVCC is charged by the internal start-up current source to a level of
approximately 4 V or higher, depending on the drain voltage. Once the drain voltage
exceeds the M-level (mains-dependent operation-enabling level), the start-up current
source will continue charging capacitor CVCC (switch S1 will be opened); see Figure1.
The IC will activate the power converter as soon as the voltage on pin VCC passes the
level VCC(start). The IC supply is taken over by the auxiliary winding as soon as the output
voltage reaches its intended level and the IC supply from the mains voltage is
subsequently stopped for high efficiency operation (green function).
The moment the voltage on pin VCC drops below the undervoltage lock-out level VUVLO,
the IC stops switching and enters a safe restart from the rectified mains voltage. Inhibiting
the auxiliary supply by external means causes the converter to operate in a stable, well
defined burst mode.
7.2 Supply management

All (internal) reference voltages are derived from a temperature compensated, on-chip
band gap circuit.
7.3 Current mode control

Current mode control is used for its good line regulation behaviour.
NXP Semiconductors TEA1552
HV start-up flyback controller for DCM or QR mode

The ‘on-time’ is controlled by the internally inverted control pin voltage, which is compared
with the primary current information. The primary current is sensed across an external
resistor. The driver output is latched in the logic, preventing multiple switch-on.
The internal control voltage is inversely proportional to the external control pin voltage,
with an offset of 1.5 V. This means that a voltage range from 1Vto 1.5 V on pin CTRL will
result in an internal control voltage range from 0.5Vto0 V (a high external control voltage
results in a low duty cycle).
7.4 Oscillator

The maximum fixed frequency of the oscillator is set by an internal current source and
capacitor. The maximum frequency is reduced once the control voltage enters the VCO
control window. Then, the maximum frequency changes linearly with the control voltage
until the minimum frequency is reached (see Figure 4 and 5).
7.5 VCO adjustment

The VCOadj pin can be used to set the VCO operation point. As soon as the peak voltage
on the sense resistor is controlled below half the voltage on the VCOadj pin (VCO1 level),
frequency reduction will start. The actual peak voltage on sense will be somewhat higher
NXP Semiconductors TEA1552
HV start-up flyback controller for DCM or QR mode

due to switch-off delay (see Figure 6). The frequency reduction will stop approximately mV lower (VCO2 level), when the minimum frequency is reached.
7.6 Cycle skipping

At very low power levels, a cycle skipping mode will be activated. A high control voltage
will reduce the switching frequency to a minimum of 25 kHz. If the voltage on the control
pin has raised even more, switch-on of the external power MOSFET will be inhibited until
the voltage on the control pin has dropped to a lower value again <.Normal_XRef>(see
Fig.6).
For system accuracy, it is not the absolute voltage on the control pin that will trigger the
cycle skipping mode, but a signal derived from the internal VCO will be used.
Remark: If the no-load requirement of the system is such that the output voltage can be
regulated to its intended level at a switching frequency of 25 kHz or above, the cycle
skipping mode will not be activated.
7.7 Standby output

The STDBY output pin (VSTDBY=5 V) can be used to drive an external NPN transistor or
FET in order to e.g. switch-off a PFC circuit. The STDBY output is activated by the internal
VCO: as soon as the VCO has reduced the switching frequency to (almost) the minimum
frequency of 25 kHz, the STDBY output will be activated (see Figure 6). The STDBY output
will go low again as soon as the VCO allows a switching frequency close to the maximum
frequency of 125 kHz.
NXP Semiconductors TEA1552
HV start-up flyback controller for DCM or QR mode
7.8 Demagnetization

The system will be in discontinuous conduction mode all the time. The oscillator will not
start a new primary stroke until the secondary stroke has ended.
Demagnetization features a cycle-by-cycle output short-circuit protection by immediately
lowering the frequency (longer off-time), thereby reducing the power level.
Demagnetization recognition is suppressed during the first time (tsuppr). This suppression
may be necessary in applications where the transformer has a large leakage inductance
and at low output voltages/start-up.
7.9 OverVoltage Protection (OVP)

An OVP mode is implemented in the GreenChip series. For the TEA1552, this works by
sensing the auxiliary voltage via the current flowing into pin DEM during the secondary
stroke. The auxiliary winding voltage is a well-defined replica of the output voltage. Any
voltage spikes are averaged by an internal filter.
If the output voltage exceeds the OVP trip level, the OVP circuit switches off the power
MOSFET. The controller then waits until the UVLO level is reached on pin VCC. When VCC
drops to UVLO, capacitor CVCC will be recharged to the Vstart level, however the IC will not
start switching again. Subsequently, VCC will drop again to the UVLO level, etc.
Operation only recommences when the VCC voltage drops below a level of approximately
4.5 V (practically when the Vmains has been disconnected for a short period).
The output voltage (VOVP) at which the OVP function trips, can be set by the
demagnetization resistor RDEM:
where Ns is the number of secondary turns and Naux is the number of auxiliary turns of the
transformer.
Current IOVP(DEM) is internally trimmed.
The value of the demagnetization resistor (RDEM) can be adjusted to the turns ratio of the
transformer, thus making an accurate OVP possible.
7.10 Valley switching (see Figure7)

A new cycle starts when the power switch is switched on. After the ‘on-time’ (which is
determined by the ‘sense’ voltage and the internal control voltage), the switch is opened
and the secondary stroke starts.
After the secondary stroke, the drain voltage shows an oscillation with a frequency of
approximately
where Lp is the primary self inductance of the transformer and Cd is the capacitance on
the drain node.
NXP Semiconductors TEA1552
HV start-up flyback controller for DCM or QR mode

As soon as the oscillator voltage is high again and the secondary stroke has ended, the
circuit waits for the lowest drain voltage before starting a new primary stroke. This method
is called valley detection. Figure 7 shows the drain voltage together with the valley signal,
the signal indicating the secondary stroke and the oscillator signal.
In an optimum design, the reflected secondary voltage on the primary side will force the
drain voltage to zero. Thus, zero voltage switching is very possible, preventing large
capacitive switching losses
and allowing high frequency operation, which results in small and cost effective inductors.
7.11 OverCurrent Protection (OCP)

The cycle-by-cycle peak drain current limit circuit uses the external source resistor to
measure the current accurately. This allows optimum size determination of the
transformer core (cost issue). The circuit is activated after the leading edge blanking time
tleb. The OCP protection circuit limits the ‘sense’ voltage to an internal level.
NXP Semiconductors TEA1552
HV start-up flyback controller for DCM or QR mode
7.12 OverPower Protection (OPP)

During the primary stroke, the rectified mains input voltage is measured by sensing the
current drawn from pin DEM. This current is dependent on the mains voltage, according to
the following formula:
where:
The current information is used to adjust the peak drain current, which is measured via
pin Isense. The internal compensation is such that an almost mains independent maximum
output power can be realized.
The OPP curve is given in Figure8.
7.13 Minimum and maximum ‘on-time’

The minimum ‘on-time’ of the SMPS is determined by the Leading Edge Blanking (LEB)
time. The IC limits the ‘on-time’ to 50 μs. When the system desires an ‘on-time’ longer
than 50 μs, a fault condition is assumed, and the IC will stop switching and enter the safe
restart mode.
7.14 Short winding protection

After the leading edge blanking time, the short winding protection circuit is also activated.
If the ‘sense’ voltage exceeds the short winding protection voltage Vswp, the converter will
stop switching. Once VCC drops below the UVLO level, capacitor CVCC will be recharged
and the supply will restart again. This cycle will be repeated until the short-circuit is
removed (safe restart mode).
The short winding protection will also protect in case of a secondary diode short-circuit.
NXP Semiconductors TEA1552
HV start-up flyback controller for DCM or QR mode
7.15 Lock input

Pin LOCK is a general purpose (high-impedance) input pin, which can be used to switch
off the IC. As soon as the voltage on this pin is raised above 2.5 V, switching will stop
immediately. The voltage on the VCC pin will cycle between VCC(start) and VCC(UVLO), but
the IC will not start switching again until the latch function is reset. The latch is reset as
soon as the VCC drops below 4.5 V (typical value). The internal OVP and OTP will also
trigger this latch Figure1.
The detection level of this input is related to the VCC(5V) pin voltage in the following way:
0.5× VCC(5V)± 4%. An internal Zener diode clamp of 5.6 V will protect this pin from
excessive voltages. No internal filtering is done on this input.
7.16 Overtemperature Protection (OTP)

An accurate temperature protection is provided in the circuit. When the junction
temperature exceeds the thermal shutdown temperature, the IC will stop switching. When
VCC drops to UVLO, capacitor CVCC will be recharged to the Vstart level, however the IC
will not start switching again. Subsequently, VCC will drop again to the UVLO level, etc.
Operation only recommences when the VCC voltage drops below a level of approximately
4.5 V (practically when the Vmains has been disconnected for a short period).
7.17 Soft start-up
o prevent transformer rattle during hiccup, the transformer peak current is slowly
increased by the soft start function. This can be achieved by inserting a resistor and a
capacitor between pin Isense and the sense resistor (see Figure 9). An internal current
source charges the capacitor to V= ISS× RSS, with a maximum of approximately 0.5V.
The start level and the time constant of the increasing primary current level can be
adjusted externally by changing the values of RSS and CSS.
The charging current ISS will flow as long as the voltage on pin Isense is below
approximately 0.5 V. If the voltage on pin Isense exceeds 0.5 V, the soft start current source
will start limiting the current ISS. At the VCC(start) level, the ISS current source is completely
switched off.
Since the soft start current ISS is subtracted from pin VCC charging current, the RSS value
will affect the VCC charging current level by a maximum of 60 μA (typical value).
NXP Semiconductors TEA1552
HV start-up flyback controller for DCM or QR mode

7.18 5 V output

Pin VCC(5V) can be used for supplying external circuitry. The maximum output current must
be limited to 1 mA. If higher peak currents are required, an external RC combination
should limit the current drawn from this pin to 1 mA maximum.
The 5 V output voltage will be available as soon as the start-up voltage is reached. As the
high voltage supply can not supply the 5 V pin during start-up and/or shutdown, during
latched shutdown (via pin LOCK or other latched protection such as OVP or OTP), the
voltage is switched to zero.
7.19 Driver

The driver circuit to the gate of the power MOSFET has a current sourcing capability of
typically 170 mA and a current sink capability of typically 700 mA. This permits fast
turn-on and turn-off of the power MOSFET for efficient operation. A low driver source
current has been chosen to limit the ΔV/Δt at switch-on. This reduces Electro Magnetic
Interference (EMI) and also limits the current spikes across Rsense.
NXP Semiconductors TEA1552
HV start-up flyback controller for DCM or QR mode
8. Limiting values

[1] All voltages are measured with respect to ground; positive currents flow into the chip; pin VCC may not be current driven. The voltage
ratings are valid provided other ratings are not violated; current ratings are valid provided the maximum power rating is not violated.
[2] Equivalent to discharging a 100 pF capacitor through a 1.5 kΩ serie resistor.
[3] Equivalent to discharging a 200 pF capacitor through a 0.75 μH coil and a 10 Ω resistor.
9. Thermal characteristics

[1] With pin GND connected to sufficient copper area on the printed-circuit board.
Table 3. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).[1]
Voltages

VVCOadj voltage on pin VCOadj continuous −0.4 +5 V
Vsense voltage on pin Isense current limited −0.4 − V
VDRAIN voltage on pin DRAIN −0.4 +650 V
VCC supply voltage continuous −0.4 +20 V
VLOCK voltage on pin LOCK continuous −0.4 +7 V
VCTRL voltage on pin CTRL −0.4 +5 V
VDEM voltage on pin DEM current limited −0.4 − V
Currents

Isense current on pin Isense −1+10 mA
ISTDBY current on pin STDBY −1- mA
IDRIVER current on pin DRIVER d<10% −0.8 +2 A
IDRAIN current on pin DRAIN - +5 mA
ICC(5V) current on pin VCC(5V) −10 mA
ICTRL current on pin CTRL - +5 mA
IDEM current on pin DEM −250 +250 μΑ
General

Ptot total power dissipation Tamb<70°C - 0.75 W
Tstg storage temperature −55 +150 °C junction temperature −20 +145 °C
ESD

Vesd electrostatic discharge voltage
pins 1 to6 and pins 9 to14 HBM class1 [2]- 2000 V
pin7 HBM class1 [2]- 1500 V
on any other pin MM [3]- 400 V
Table 4. Thermal characteristics

Rth(j-a) thermal resistance from junction to ambient in free air [1] 100 K/W
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