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TEA2025SanyoN/a104avaiSTEREO AUDIO AMPLIFIER


TEA2025 ,STEREO AUDIO AMPLIFIERTEA2025BTEA2025D®STEREO AUDIO AMPLIFIERDUAL OR BRIDGE CONNECTION MODESFEW EXTERNAL COMPONENTSSUPPLY ..
TEA2025B ,STEREO AUDIO AMPLIFIERTEA2025BTEA2025DSTEREO AUDIO AMPLIFIERDUAL OR BRIDGE CONNECTION MODESFEW EXTERNAL COMPONENTSSUPPLY ..
TEA2025B# ,STEREO AUDIO AMPLIFIERBLOCK DIAGRAMGND(Sub) IN 1+ FEED GND GND BOOT 1 OUT 150ΩTHERMAL10KΩPROTECT.-1 1+START5KΩCIRCUITSVR ..
TEA2025B. ,STEREO AUDIO AMPLIFIERBLOCK DIAGRAMGND(Sub) IN 1+ FEED GND GND BOOT 1 OUT 150ΩTHERMAL10KΩPROTECT.-1 1+START5KΩCIRCUITSVR ..
TEA2025D ,STEREO AUDIO AMPLIFIERTEA2025BTEA2025DSTEREO AUDIO AMPLIFIERDUAL OR BRIDGE CONNECTION MODESFEW EXTERNAL COMPONENTSSUPPLY ..
TEA2026 ,COLOR TV SCANNING AND POWER SUPPLY PROCESSOR= SGS-'mt3MS0H " Wt1PiC(j)f LE©UE§©M©$ TEA2026C COLOR TV SCANNING AND POWER SUPPLY PROCESSOR ..
TL16C452FN ,Dual UART with Parallel Port And Without FIFOTL16C451, TL16C452ASYNCHRONOUS COMMUNICATIONS ELEMENTSSLLS053C – MAY 1989 – REVISED AUGUST 1999* In ..
TL16C452FNR ,Dual UART with Parallel Port And Without FIFOblock diagramTL16C4512824CTS0 ACE RTS03125DSR0 DTR0129 26RLSD0 SOUT030 45RI0 INT041SIN032CS014 – 21 ..
TL16C452FNRG4 ,Dual UART with Parallel Port And Without FIFO 68-PLCC 0 to 70block diagramTL16C4512824CTS0 ACE RTS03125DSR0 DTR0129 26RLSD0 SOUT030 45RI0 INT041SIN032CS014 – 21 ..
TL16C452FNRG4 ,Dual UART with Parallel Port And Without FIFO 68-PLCC 0 to 70TL16C451, TL16C452ASYNCHRONOUS COMMUNICATIONS ELEMENTSSLLS053C – MAY 1989 – REVISED AUGUST 1999* In ..
TL16C550 , ASYNCHRONOUS COMMUNICATIONS ELEMENT
TL16C550AFNR , SINGLE UART WITH 16-BYTE FIFO


TEA2025
STEREO AUDIO AMPLIFIER
TEA2025B
TEA2025D

STEREO AUDIO AMPLIFIER
DUAL OR BRIDGE CONNECTION MODES
FEW EXTERNAL COMPONENTS
SUPPLY VOLTAGE DOWN TO 3V
HIGH CHANNEL SEPARATION
VERY LOW SWITCH ON/OFF NOISE
MAX GAIN OF 45dB WITH ADJUST EXTER-
NAL RESISTOR
SOFT CLIPPING
THERMAL PROTECTION
3V < VCC < 15V
P = 2 • 1W, VCC = 6V, RL = 4Ω
P = 2 • 2.3W, VCC = 9V, RL = 4Ω
P = 2 • 0.1W, VCC = 3V, RL = 4Ω
DESCRIPTION

The TEA2025B/D is a monolithic integrated circuit
in 12+2+2 Powerdip and 12+4+4 SO, intended for
use as dual or bridge power audio amplifier port-
able radio cassette players.
ABSOLUTE MAXIMUM RATINGS
BLOCK DIAGRAM

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POWERDIP 12+2+2 PIN CONNECTION (Top view)
SO 12+4+4 PIN CONNECTION (Top view)

(*) The Rth j-amb is measured with 4sq cm copper area heatsink
(**) The Rth j-amb is measured on devices bonded on a 10 x 5 x 0.15cm glass-epoxy substrate with a 35μm thick copper surface of 5 cm2.
THERMAL DATA
TEA2025B - TEA2025D

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ELECTRICAL CHARACTERISTICS (Tamb = 25°C, VCC = 9V, Stereo unless otherwise specified)
Figure 1: Bridge Application (Powerdip) Figure 2: Stereo Application (Powerdip)
TEA2025B - TEA2025D
6 9 12 15I(mA)
Vs(V)
Figure 3: Supply Current vs. Supply Voltage

(RL = 4Ω)
3.5 6 9 12 15
Po(W)
Vs(V)
Figure 5: Output Power vs. Supply Voltage

(THD = 10%, f = 1KHz)
0.1 0.2 0.4 0.6 0.8 1
THD(%)
Po(W)
Figure 6: THD versus Output Power

(f = 1KHz, VS = 6V) 9 12 15
Vo(V)
Vs(V)Vs(V)
Figure 4: Output Voltage vs. Supply Voltage
TEA2025B - TEA2025D

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APPLICATION INFORMATION
Input Capacitor

Input capacitor is PNP type allowing source to be
referenced to ground.
In this way no input coupling capacitor is required.
However, a series capacitor (0.22 uF)to the input
side can be useful in case of noise due to variable
resistor contact.
Bootstrap

The bootstrap connection allows to increase the
output swing.
The suggested value for the bootstrap capacitors
(100uF) avoids a reduction of the output signal
also at low frequencies and low supply voltages.
Voltage Gain Adjust

STEREO MODE
The voltage gain is determined by on-chip resis-
tors R1 and R2 together with the external RfC1
series connected between pin 6 (11) and ground.
The frequency response is given approximated
by:
VOUT
VIN = R1
Rf + R2 + 1
JWC1With Rf=0, C1=100 uF, the gain results 46 dB
with pole at f=32 Hz.
THE purpose of Rf is to reduce the gain. It is rec-
ommended to not reduce it under 36 dB.
BRIDGE MODE
The bridge configuration is realized very easily
thanks to an internal voltage divider which pro-
vides (at pin 1) the CH 1 output signal after reduc-
tion. It is enough to connect pin 6 (inverting input
of CH 2) with a capacitor to pin 1 and to connect
to ground the pin 7.
The total gain of the bridge is given by:
VOUT
VIN = R1
Rf+R2 + 1
JWC1
(1+ R3 R1
R2+R4+ 1
JWC1
and with the suggested values (C1 = C2 = 100 μF,
Rf= 0) means:
Gv = 52 dB
with first pole at f = 32 Hz
Output Capacitors.

The low cut off frequency due to output capacitor
depending on the load is given by:
FL = 1
2 ΠCOUT • RL
with COUT 470μF and RL = 4 ohm it means FL =
80 Hz.
Pop Noise

Most amplifiers similar to TEA 2025B need exter-
nal resistors between DC outputs and ground in
order to optimize the pop on/off performance and
crossover distortion.
The TEA 2025B solution allows to save compo-
nents because of such resistors (800 ohm)are in-
cluded into the chip.
Figure 7
Figure 8
Figure 9
TEA2025B - TEA2025D
Stability
A good layout is recommended in order to avoid
oscillations.
Generally the designer must pay attention on the
following points:
- Short wires of components and short connec-
tions.
- No ground loops.
- Bypass of supply voltage with capacitors as
nearest as possible to the supply I.C.pin.The
low value(poliester)capacitors must have
good temperature and frequency charac-
teristics.
- No sockets.
2) the heatsink can have a smaller factor of safety
compared with that of a conventional circuit.
There is no device damage in the case of ex-
cessive junction temperature: all that happens
is that PO (and therefore Ptot) and Id are re-
duced.
APPLICATION SUGGESTION

The recommended values of the components are
those shown on stereo application circuit of
Fig. 2 different values can be used, the follow-
ing table can help the designer.
TEA2025B - TEA2025D

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