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TEA6320T
Sound fader control circuit
Philips Semiconductors Preliminary specification
Sound fader control circuit TEA6320
FEATURES Source selector for four stereo and one mono inputs Interface for noise reduction circuits Interface for external equalizer Volume, balance and fader control Special loudness characteristic automatically controlled
in combination with volume setting Bass and treble control Mute control at audio signal zero crossing Fast mute control via I2 C-bus Fast mute control via pinI2 C-bus control for all functions Power supply with internal power-on reset.
GENERAL DESCRIPTIONThe sound fader control circuit TEA6320 is an I2 C-bus
controlled stereo preamplifier for car radio hi-fi sound
applications.
QUICK REFERENCE DATA
ORDERING INFORMATION
Philips Semiconductors Preliminary specification
Sound fader control circuit TEA6320
BLOCK DIAGRAM
Philips Semiconductors Preliminary specification
Sound fader control circuit TEA6320
PINNING
Philips Semiconductors Preliminary specification
Sound fader control circuit TEA6320
FUNCTIONAL DESCRIPTIONThe source selector selects one of 4 stereo inputs or the
mono input. The maximum input signal voltage is
Vi(rms)=2 V. The outputs of the source selector and the
inputs of the following volume control parts are available at
pins 8 and 10 for the left channel and pins 23 and 25 for
the right channel. This offers the possibility of interfacing a
noise reduction system.
The volume control function is split into two sections:
volume I control block and volume II control block.
The control range of volume I is between +20 dB and
−31 dB in steps of 1 dB. The volume II control range is
between 0 dB and −55 dB in steps of 1 dB. Although the
theoretical possible control range is 106dB
(+20to −86 dB), in practice a range of 86 dB (+20to
−66 dB) is recommended. The gain/attenuation setting of
the volume I control block is common for both channels.
The volume I control block operates in combination with
the loudness control. The filter is linear when the maximum
gain for the volume I control (+20 dB) is selected. The filter
characteristic increases automatically over a range of dB down to a setting of −12 dB. That means the
maximum filter characteristic is obtained at −12 dB setting
of volume I. Further reduction of the volume does not
further influence the filter characteristic (see Fig.5). The
maximum selected filter characteristic is determined by
external components. The proposed application gives a
maximum boost of 17 dB for bass and 4.5 dB for treble.
The loudness may be switched on or off via I2 C-bus control
(see Table7).
The volume I control block is followed by the bass control
block. A single external capacitor of 33 nF for each
channel in combination with internal resistors, provides the
frequency response of the bass control (see Fig.3). The
adjustable range is between −15 and +15 dB at 40 Hz.
Both loudness and bass control result in a maximum bass
boost of 32 dB for low volume settings.
The treble control block offers a control range between
−12 and +12 dB in steps of 1.5 dB at 15 kHz. The filter
characteristic is determined by a single capacitor of 5.6nF
for each channel in combination with internal resistors
(see Fig.4).
The basic step width of bass and treble control is 3 dB. The
intermediate steps are obtained by switching 1.5 dB boost
and 1.5 dB attenuation steps.
The bass and treble control functions can be switched off
via I2 C-bus. In this event the internal signal flow is
disconnected. The connections B2L and B2R are outputs
and TL and TR are inputs for inserting an external
equalizer.
The last section of the circuit is the volume II block. The
balance and fader functions are performed using the same
control blocks. This is realized by 4 independently
controllable attenuators, one for each output. The control
range of these attenuators is 55 dB in steps of 1 dB with an
additional mute step.
The circuit provides 3 mute modes: Zero crossing mode mute via I2 C-bus using independent zero crossing detectors (ZCM,
see Tables 2 and 9 and Fig.16). Fast mute via MUTE pin (see Fig.10). Fast mute via I2C-bus either by general mute (GMU,
see Tables 2 and 9) or volume II block setting
(see Table4).
The mute function is performed immediately if ZCM is
cleared (ZCM= 0). If the bit is set (ZCM= 1) the mute is
activated after changing the GMU bit. The actual mute
switching is delayed until the next zero crossing of the
audio frequency signal. As the two audio channels (left and
right) are independent, two comparators are built-in to
control independent mute switches.
To avoid a large delay of mute switching when very low
frequencies are processed, the maximum delay time is
limited to typically 100 ms by an integrated timing circuit
and an external capacitor (Cm=10 nF, see Fig.10). This
timing circuit is triggered by reception of a new data word
for the switch function which includes the GMU bit. After a
discharge and charge period of an external capacitor the
muting switch follows the GMU bit if no zero crossing was
detected during that time.
The mute function can also be controlled externally. If the
mute pin is switched to ground all outputs are muted
immediately (hardware mute). This mute request
overwrites all mute controls via the I2 C-bus for the time the
pin is held LOW. The hardware mute position is not stored
in the TEA6320.
For the turn on/off behaviour the following explanation is
generally valid. To avoid AF output caused by the input
signal coming from preceding stages, which produces
output during drop of VCC, the mute has to be set, before
the VCC will drop. This can be achieved by I2 C-bus control
or by grounding the MUTE pin.
For use where is no mute in the application before turn off,
a supply voltage drop of more than 1× VBE will result in a
mute during the voltage drop.
Philips Semiconductors Preliminary specification
Sound fader control circuit TEA6320
The power supply should include a VCC buffer capacitor,
which provides a discharging time constant. If the input
signal does not disappear after turn off the input will
become audible after certain time. A 4.7 kΩ resistor
discharges the VCC buffer capacitor, because the internal
current of the IC does not discharge it completely.
The hardware mute function is favourable for use in Radio
Data System (RDS) applications. The zero crossing mute
avoids modulation plops. This feature is an advantage for
mute during changing presets and/or sources (e.g. traffic
announcement during cassette playback).
LIMITING VALUESIn accordance with the Absolute Maximum Rating System (IEC 134).
Note Human body model: C= 100 pF; R= 1.5 kΩ; V≥2 kV. Charge device model: C= 200 pF; R=0 Ω; V≥ 500V.
Philips Semiconductors Preliminary specification
Sound fader control circuit TEA6320
CHARACTERISTICSVCC= 8.5 V; RS= 600 Ω; RL =10kΩ; CL= 2.5 nF; AC coupled; f=1 kHz; Tamb =25 °C; gain control Gv=0 dB; bass
linear; treble linear; fader off; balance in mid position; loudness off; unless otherwise specified.
Philips Semiconductors Preliminary specification
Sound fader control circuit TEA6320
Philips Semiconductors Preliminary specification
Sound fader control circuit TEA6320
Philips Semiconductors Preliminary specification
Sound fader control circuit TEA6320
Notes to the characteristics The indicated values for output power assume a 6 W power amplifier at 4 Ω with 20 dB gain and a fixed attenuator
of 12 dB in front of it. Signal-to-noise ratios exclude noise contribution of the power amplifier. The transmission contains: total initialization with MAD and subaddress for volume and 8 data words, see also
definition of characteristics, clock frequency=50 kHz, repetition burst rate= 400 Hz, maximum bus signal
amplitude=5V (p-p). The AC characteristics are in accordance with the I2 C-bus specification. This specification, “The I2 C-bus and how to
use it”, can be ordered using the code 9398 393 40011.
Philips Semiconductors Preliminary specification
Sound fader control circuit TEA6320
I2C-BUS PROTOCOL2 C-bus format
Notes S= START condition. SLAVE ADDRESS (MAD)= 1000 0000. A= acknowledge, generated by the slave. SUBADDRESS (SAD), see Table1. DATA, see Table 1; if more than 1 byte of DATA is transmitted, then auto-increment of the significant subaddress is
performed. P= STOP condition.
Table 1 Second byte after MAD
Note Significant subaddress.
Philips Semiconductors Preliminary specification
Sound fader control circuit TEA6320
Table 2 Definition of third byte after MAD and SAD
Notes Zero crossing mode. Switch loudness on/off. Volume control. Don’t care bits (logic 1 during testing). Fader control front right. Fader control front left. Fader control rear right. Fader control rear left. Bass control.
10. Treble control.
11. Mute control for all outputs (general mute).
12. Source selector control.
Philips Semiconductors Preliminary specification
Sound fader control circuit TEA6320
Table 3 Volume I setting
Philips Semiconductors Preliminary specification
Sound fader control circuit TEA6320
Philips Semiconductors Preliminary specification
Sound fader control circuit TEA6320
Table 4 Volume II setting (fader and balance); note1
Philips Semiconductors Preliminary specification
Sound fader control circuit TEA6320
Note For a particular range the data is always the same, only the subaddress changes.
Philips Semiconductors Preliminary specification
Sound fader control circuit TEA6320
Table 5 Bass setting
Notes Recommended data word for step 0 dB. Result of 1.5 dB boost and 1.5 dB attenuation. The last four bass control data words mute the bass response. The last bass control and treble control data words (00000) enable the external equalizer connection.
Philips Semiconductors Preliminary specification
Sound fader control circuit TEA6320
Table 6 Treble setting
Notes Recommended data word for step 0 dB. Result of 1.5 dB boost and 1.5 dB attenuation. The last eight treble control data words select treble output. The last treble control and bass control data words (00000) enable the external equalizer connection.
Philips Semiconductors Preliminary specification
Sound fader control circuit TEA6320
Table 7 Loudness setting
Table 8 Selected input
Note X= don’t care bits (logic 1 during testing).
Table 9 Mute mode
Philips Semiconductors Preliminary specification
Sound fader control circuit TEA6320
