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TLE4290G
5-V Low-Drop Voltage Regulator
5-V Low-Drop Voltage Regulator TLE4290
FeaturesOutput voltage 5V±2%Very low current consumption450 mA current capabilityPower Good FeatureVery low-drop voltageShort-circuit-proofReverse polarity proofSuitable for use in automotive electronics
• New type
Functional DescriptionThe TLE4290 is a monolithic integrated low-drop
voltage regulator which can supply loads up to 450mA
with power good feature. An input voltage up to 42V is
regulated to VQ,nom=5.0V. The device is designed to
supply µ-controllers in the severe environment of
automotive applications. Therefore it is protected
against overload, short circuit and over temperature
conditions. Of course the TLE4290 can been used also
in all other applications, where a stabilized 5V voltage is
required.
Power GoodThe Power Good PG pin informs e.g. the microcontroller in case the output voltage has
fallen below the lower threshold VQ,pgt-d of typ. 3.65V. Connecting the regulator to a
battery voltage at first the power good signal remains LOW. When the output voltage has
reached the higher threshold VQ,pgt-i the power good output remains still LOW for the
power good delay time trd. Afterwards the power good output turns HIGH. The delay time
can be set by the user with an external capacitor at pin D according to the requirements
of the application.
The Power Good circuitry supervises the output voltage. In case VQ falls below the lower
Power Good switching threshold VQ,pgt-d the PG output is set LOW after the Power Good
reaction time. The Power Good LOW signal is generated down to an output voltage VQ
to 1 V. A LOW signal at the Power Good pin informs that the battery was lost and
memory is no longer valid.
The feature should be used in combination with a microcontroller with internal reset.
Figure1Block Diagram
Figure2Pin Configuration (top view)
Pin Definitions and Functions
Note:Stresses above those listed here may cause permanent damage to the device.
Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Absolute Maximum Ratings
Input I
Output Q
Power Good Output PG
Delay D
Temperature
Note:In the operating range, the functions given in the circuit description are fulfilled.
Operating Range
Thermal ResistanceWorst case, regarding peak temperature; zero airflow; mounted on a PCB FR4, 80×80×1.5mm3, heat sink
area 300mm2
CharacteristicsI=13.5V;–40°C
Output
Power Good Output PG and Delay Timing D
Note:The listed characteristics are ensured over the operating range of the integrated
circuit. Typical characteristics specify mean values expected over the production
spread. If not otherwise specified, typical characteristics apply at Ta = 25°C and
the given supply voltage.
Figure3Test CircuitMeasured when the output voltage VQ has dropped 100 mV from the nominal value obtained at VI = 13.5 V.
Characteristics (cont’d)I=13.5V;–40°CApplication Information
Figure4Application Diagram
Input, Output
An input capacitor is necessary for damping line influences. A resistor of approx. 1Ω in
series with CI, can damp the LC of the input inductivity and the input capacitor.
The TLE4290 requires an output capacitor of at least 22µF with an ESR below 5Ω for
stability.
Power Good
The Power Good pin informs e.g. the micro-controller in case the output voltage has
fallen below a threshold of typ. 3.65V. When the battery voltage is supplied the Power
Good signal indicates a loss of memory due to missing power. After the Memory Good
switching threshold is reached the Power Good output remains low for the Power Good
delay time. This time can be set by the user with an external capacitor at pin D according
to the requirements of the application, e.g. the time until the microcontroller is initialized
and ready to receive any information.
The power good circuit supervises the output voltage. In case VQ falls below the Power
Good switching threshold the Power Good output PG is set LOW after the power good
reaction time. The power good LOW signal is generated down to an output voltage VQ
to 1 V. A LOW signal at the power good pin informs that the battery was lost and memory
is no longer valid.
The feature should only be used in combination to a microcontroller with internal reset.
For the power good delay time after the output voltage of the regulator is above the reset
threshold, the reset signal is set High again. The reset delay time is defined by the reset
delay capacitor CD at pin D.
The Power Good delay time is defined by the charging time of an external delay
capacitor CD. D= (trd × ID,c) / ∆V
With CDPower Good delay capacitorrdPower Good delay time= VDU, typical 1.8 VD,cCharge current typical 6 µA
Figure5Power Good Timing
