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MAX16047ETN+MAXIMN/a10avai12-/8-Channel EEPROM-Programmable System Managers with Nonvolatile Fault Registers


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MAX16047ETN+
12-/8-Channel EEPROM-Programmable System Managers with Nonvolatile Fault Registers
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers

EVALUATION KIT AVAILABLE
General Description

The MAX16047/MAX16049 EEPROM-configurable system
managers monitor, sequence, and track multiple system
voltages. The MAX16047 manages up to twelve system
voltages simultaneously, and the MAX16049 manages up
to eight supply voltages. These devices integrate an ana-
log-to-digital converter (ADC) for monitoring supply volt-
ages, and configurable outputs for sequencing and
tracking supplies (during power-up and power-down).
Nonvolatile EEPROM registers are configurable for storing
upper and lower voltage limits, setting timing and
sequencing requirements, and for storing critical fault
data for read back following failures.
An internal 1% accurate 10-bit ADC measures each input
and compares the result to one upper, one lower, and
one selectable upper or lower limit. A fault signal asserts
when a monitored voltage falls outside the set limits. Up
to three independent fault output signals are configurable
to assert under various fault conditions.
The integrated sequencer/tracker allows precise control
over the power-up and power-down order of up to twelve
(MAX16047) or up to eight (MAX16049) power supplies.
Four channels (EN_OUT1–EN_OUT4) support closed-
loop tracking using external series MOSFETs. Six outputs
(EN_OUT1–EN_OUT6) are configurable with charge-
pump outputs to directly drive MOSFETs without closed-
loop tracking.
The MAX16047/MAX16049 include six programmable
general-purpose inputs/outputs (GPIOs). In addition to
serving as EEPROM-configurable I/O pins, the GPIOs
are also configurable as dedicated fault outputs, as a
watchdog input or output (WDI/WDO), or as a manual
reset (MR).
The MAX16047/MAX16049 feature two methods of fault
management for recording information during critical
fault events. The fault logger records a failure in the
internal EEPROM and sets a lock bit protecting the
stored fault data from accidental erasure.
An I2C/SMBus-compatible or a JTAG serial interface con-
figures the MAX16047/MAX16049. These devices are
offered in a 56-pin 8mm x 8mm TQFN package and are
fully specified from -40°C to +85°C.
Features
Operate from 3V to 14V1% Accurate 10-Bit ADC Monitors 12/8 Inputs12/8 Monitored Inputs with One Overvoltage/
One Undervoltage/One Selectable Limit
Nonvolatile Fault Event LoggerPower-Up and Power-Down Sequencing
Capability
12/8 Outputs for Sequencing/Power-Good
Indicators
Closed-Loop Tracking for Up to Four ChannelsTwo Programmable Fault Outputs and One Reset
Output
Six General-Purpose Input/Outputs Configurable as:
Dedicated Fault Output
Watchdog Timer Function
Manual Reset
I2C/SMBus-Compatible and JTAG InterfaceEEPROM-Configurable Time Delays and
Thresholds
100 Bytes of Internal User EEPROM56-Pin (8mm x 8mm) TQFN Package-40°C to +85°C Operating Temperature Range
Applications

Servers
Workstations
Storage Systems
Networking/Telecom
Ordering Information
PARTTEMP RANGEPIN-PACKAGE
MAX16047ETN+
-40°C to +85°C56 TQFN-EP*
MAX16049ETN+
-40°C to +85°C56 TQFN-EP*
+Denotes a lead(Pb)-free/RoHS-compliant package.
*EP = Exposed Pad.
Selector Guide and Pin Configurations appear at end of data
sheet.
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers

MON1
MON2–MON11
MON12
VSUPPLY
VCC
VCC
+3.3V
GNDµC
SCL
SDA
RESET
FAULTINT
RESET
INT
I/OWDI
WDO
EN_OUT1
EN_OUT2–
EN_OUT11
EN_OUT12
MAX16047A
GND
OUTIN
DC-DC
GND
OUTIN
DC-DC
GND
OUTIN
DC-DC
10µF
DBP
1µF
ABP
1µF
Typical Operating Circuit
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(VCC= 3V to 14V, TA= -40°C to +85°C, unless otherwise specified. Typical values are at VCC= 3.3V, TA= +25°C.) (Note 1)
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
VCCto GND....................……………………………-0.3V to +15V
EN, MON_, SCL, SDA, A0 to GND...........................-0.3V to +6V
GPIO_, EN_OUT7–EN_OUT12, RESET
(configured as open drain) to GND.......................-0.3V to +6V
EN_OUT1–EN_OUT6
(configured as open-drain) to GND....................-0.3V to +12V
GPIO_, EN_OUT, RESET
(configured as push-pull) to GND.........-0.3V to (VDBP+ 0.3V)
DBP, ABP to GND.........-0.3V to the lower of 4V or (VCC+ 0.3V)
TCK, TMS, TDI to GND..........................................-0.3V to +3.6V
TDO to GND.............................................-0.3V to (VDBP+ 0.3V)
EN_OUT1–EN_OUT6
(configured as charge pump) to GND.-0.3V to (VMON1–6+ 6V)
Continuous Current (all pins)............................................±20mA
Continuous Power Dissipation (TA= +70°C)
56-Pin TQFN (derate 47.6mW/°C above +70°C).......3810mW*
Thermal Resistance
θJA.............................……………………………………...21°C/W
θJC.............................……………………………………..0.6°C/W
Operating Temperature Range...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s).................................+300°C
Soldering Temperature (reflow).......................................+260°C
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

RESET output asserted low1.4Operating Voltage RangeVCC314V
Undervoltage LockoutVUVLO(Note 2)2.85V
Undervoltage-Lockout HysteresisUVLOHYS50mV
Supply CurrentICCVCC = 14V, VEN = 3.3V, no load on any
output3.85mA
DBP Regulator VoltageVDBPCDBP = 1µF, no load on any output2.62.72.8V
ABP Regulator VoltageVABPCABP = 1µF, no load2.782.882.96V
Boot TimetBOOTVCC > VUVLO0.81.5ms
Internal Timing Accuracy(Note 3)-5+5%
ADC

ADC Resolution10Bits
MON_ range set to ‘00’ in r0Fh–r11h0.65
MON_ range set to ‘00’ in r0Fh–r11h0.75ADC Total Unadjusted Error
(Note 4)ADCERR
MON_ range set to ‘00’ in r0Fh–r11h0.95
%FSR
ADC Integral NonlinearityADCINL0.8LSB
ADC Differential NonlinearityADCDNL0.8LSB
ADC Total Monitoring Cycle TimetCYCLEAll channels monitored,
no MON_ fault detected (Note 5)80100µs
MON1–MON446.5100MON_ Input ImpedanceRINMON5–MON1265140kΩ
*As per JEDEC 51 Standard, Multilayer Board (PCB).
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS

MON_ range set to ‘00’ in r0Fh–r11h5.6
MON_ range set to ‘01’ in r0Fh–r11h2.8ADC MON_ RangesADCRNG
MON_ range set to ‘10’ in r0Fh–r11h1.4
MON_ range set to ‘00’ in r0Fh–r11h5.46
MON_ range set to ‘01’ in r0Fh–r11h2.73ADC LSB Step SizeADCLSB
MON_ range set to ‘10’ in r0Fh–r11h1.36
VTH_EN_REN voltage rising0.525EN Input-Voltage ThresholdVTH_EN_FEN voltage falling0.4870.5000.512V
EN Input CurrentIEN-0.5+0.5µA
EN Input Voltage Range05.5V
CLOSED-LOOP TRACKING

Tracking Differential Voltage Stop
RampVTRKVINS_ > VTH_PL, VINS_ < VTH_PG150mV
Tracking Differential Voltage
Hysteresis20%VTRK
Tracking Differential Fault VoltageVTRK_FVINS_ > VTH_PL, VINS_ < VTH_PG285330375mV
Slew-rate register set to ‘00’640800960
Slew-rate register set to ‘01’320400480
Slew-rate register set to ‘10’160200240
Track/Sequence Slew-Rate Rising
or FallingTRKSLEW
Slew-rate register set to ‘11’80100120
V/s
Power-good register set to ‘00,’
VMON_ = 3.5V949596
Power-good register set to ‘01,’
VMON_ = 3.5V91.592.593.5
Power-good register set to ‘10,’
VMON_ = 3.5V899091
INS_ Power-Good ThresholdVTH_PG
Power-good register set to ‘11,’
VMON_ = 3.5V86.587.588.5
%V M ON_
Power-Good Threshold
HysteresisVPG_HYS0.5%VTH_PG
Power-Low ThresholdVTH_PLINS_ falling125142160mV
Power-Low HysteresisVTH_PL_HYS10mV
GPIO_ Input ImpedanceGPIOINRGPIO_ configured as INS_75100145kΩ
INS_ to GND Pulldown
Impedance when EnabledINSRPDVINS_ = 2V100Ω
ELECTRICAL CHARACTERISTICS (continued)

(VCC= 3V to 14V, TA= -40°C to +85°C, unless otherwise specified. Typical values are at VCC= 3.3V, TA= +25°C.) (Note 1)
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
ELECTRICAL CHARACTERISTICS (continued)

(VCC= 3V to 14V, TA= -40°C to +85°C, unless otherwise specified. Typical values are at VCC= 3.3V, TA= +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
OUTPUTS (EN_OUT_, RESET, GPIO_)

Output-Voltage LowVOLISINK = 2mA0.4V
Output-Voltage High (Push-Pull)ISOURCE = 100µA2.4V
GPIO1–GPIO4, VGPIO_ = 3.3V1Output Leakage (Open Drain)IOUT_LKG
GPIO1–GPIO4, VGPIO_ = 5V22
EN_OUT_ Overdrive (Charge
Pump) (EN_OUT1 to EN_OUT6
Only) Volts above VMON_
VOVIGATE_ = 0.5µA4.65.15.6V
EN_OUT_ Pullup Current (Charge
Pump)ICHG_UPDuring power-up/power-down,
VGATE_ = 1V4.56µA
EN_OUT_ Pulldown Current
(Charge Pump)ICHG_DOWNDuring power-up/power-down,
VGATE_ = 5V10µA
INPUTS (A0, GPIO_)

Logic-Input Low VoltageVIL0.8V
Logic-Input High VoltageVIH2.0V
SMBus INTERFACE

Logic-Input Low VoltageVILInput voltage falling0.8V
Logic-Input High VoltageVIHInput voltage rising2.0V
VCC shorted to GND, SCL/SDA at 0V or
3.3V-1+1Input Leakage Current+1
Output-Voltage LowVOLISINK = 3mA0.4V
Input CapacitanceCIN5pF
SMBus TIMING

Serial Clock FrequencyfSCL400kHz
Bus Free Time Between STOPtBUF1.3µs
START Condition Setup TimetSU:STA0.6µs
START Condition Hold TimetHD:STA0.6µs
STOP Condition Setup TimetSU:STO0.6µs
Clock Low PeriodtLOW1.3µs
Clock High PeriodtHIGH0.6µs
Data Setup TimetSU:DAT200ns
Output Fall TimetOF10pF ≤ CBUS ≤ 400pF250ns
Receive0Data Hold TimetHD:DATTransmit0.30.9µs
Pulse Width of Spike SuppressedtSP30ns
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
ELECTRICAL CHARACTERISTICS (continued)

(VCC= 3V to 14V, TA= -40°C to +85°C, unless otherwise specified. Typical values are at VCC= 3.3V, TA= +25°C.) (Note 1)
PARAMETERSYMBOLCONDITIONSMINTYPMAXUNITS
JTAG INTERFACE

TDI, TMS, TCK Logic-Low Input
VoltageVILInput voltage falling0.55V
TDI, TMS, TCK Logic-High Input
VoltageVIHInput voltage rising2V
TDO Logic-Output Low VoltageVOL_TDOVDBP ≥ 2.5V, ISINK = 2mA0.4V
TDO Logic-Output High VoltageVOH_TDOVDBP ≥ 2.5V, ISOURCE = 200µA2.4V
TDO Leakage CurrentTDO high impedance-1+1µA
TDI, TMS Pullup ResistorsRJPUPullup to VDBP71013kΩ
Input/Output CapacitanceCI/O5pF
JTAG TIMING

TCK Clock Periodt11000ns
TCK High/Low Timet2, t350500ns
TCK to TMS, TDI Setup Timet415ns
TCK to TMS, TDI Hold Timet515ns
TCK to TDO Delayt6500ns
TCK to TDO High-Z Delayt7500ns
EEPROM TIMING

EEPROM Byte Write Cycle TimetWR(Note 6)10.512ms
Note 1:
Specifications are guaranteed for the stated global conditions, unless otherwise noted. 100% production tested at TA= +25°C
and TA= +85°C. Specifications at TA= -40°C are guaranteed by design.
Note 2:
VUVLOis the minimum voltage on VCCto ensure the device is EEPROM configured.
Note 3:
Applies to RESET, fault, delay, and watchdog timeouts.
Note 4:
Total unadjusted error is a combination of gain, offset, and quantization error.
Note 5:
Guaranteed by design.
Note 6:
An additional cycle is required when writing to configuration memory for the first time.
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers

STOP
CONDITION
REPEATED START
CONDITION
START
CONDITION
tHIGH
tLOWtF
tSU:DATtSU:STA
tSU:STOtHD:STA
tBUF
tHD:STA
tHD:DAT
SCL
SDA
START
CONDITION
Figure 1. I2C/SMBus Timing Diagram
TCKt3t5
TDI, TMS
TDO
Figure 2. JTAG Timing Diagram
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
VCC SUPPLY CURRENT
vs. VCC SUPPLY VOLTAGE

MAX16047 toc01
VCC (V)
ICC
(mA)121235678910411
TA = +85°C
TA = -40°CTA = +25°C
NORMALIZED MON_ THRESHOLD
vs. TEMPERATURE

MAX16047 toc02
TEMPERATURE (°C)
NORMALIZED MON_ THRESHOLD603045-15015-30
2.8V RANGE, HALF SCALE,
PUV THRESHOLD
NORMALIZED EN THRESHOLD
vs. TEMPERATURE

MAX16047 toc03
TEMPERATURE (°C)
NORMALIZED EN THRESHOLD603045-15015-30
Typical Operating Characteristics
(VCC= 3.3V, TA= +25°C, unless otherwise noted.)
TRANSIENT DURATION
vs. THRESHOLD OVERDRIVE (EN)

MAX16047 toc04
EN OVERDRIVE (mV)
TRANSIENT DURATION (
NORMALIZED RESET TIMEOUT PERIOD
vs. TEMPERATURE
MAX16047 toc05
TEMPERATURE (°C)
NORMALIZED RESET TIMEOUT603045-15015-30
MON_ PUV THRESHOLD OVERDRIVE
vs. TRANSIENT DURATION
MAX16047 toc06
THRESHOLD OVERDRIVE (mV)
TRANSIENT DURATION (
DEGLITCH = 16
DEGLITCH = 8
DEGLITCH = 4
DEGLITCH = 2
OUTPUT-VOLTAGE LOW
vs. SINK CURRENT

MAX16047 toc07
OUTPUT-VOLTAGE LOW (V)4123
EN_OUT_
GPIO_
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
TRACKING MODE WITH
FAST SHUTDOWN

MAX16047 toc13
1V/div
INS4
INS3
INS2
INS1
SEQUENCING MODE

MAX16047 toc14
1V/div
INS4
INS3
INS2
INS1
FET TURN-ON WITH CHARGE PUMP

MAX16047 toc11
20ms/div
VEN_OUT_
10V/div
VSOURCE
2V/div
IDRAIN
1A/div
TRACKING MODE

MAX16047 toc12
20ms/div
1V/div
INS4
INS3
INS2
INS1
OUTPUT-VOLTAGE HIGH vs. SOURCE
CURRENT (CHARGE-PUMP OUTPUT)

MAX16047 toc08
SOURCE CURRENT (μA)
OUTPUT-VOLTAGE HIGH (V)54321
OUTPUT-VOLTAGE HIGH vs. SOURCE
CURRENT (PUSH-PULL OUTPUT)

MAX16047 toc09
SOURCE CURRENT (μA)
OUTPUT-VOLTAGE HIGH (V)
ADC ACCURACY
vs. TEMPERATURE
MAX16047 toc10
TEMPERATURE (°C)
TOTAL UNADJUSTED ERROR (%)603045-15015-30
Typical Operating Characteristics (continued)
(VCC= 3.3V, TA= +25°C, unless otherwise noted.)
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
ADC INL

MAX16047 toc17
INPUT VOLTAGE (DIGITAL CODE)
ADC INL (LSB)
INTERNAL TIMING ACCURACY
vs. TEMPERATURE
MAX16047 toc18
TEMPERATURE (°C)
NORMALIZED SLOT DELAY603045-15015-30
MIXED MODE
MAX16047 toc15
20ms/div
1V/div
INS4
INS3
INS2
INS1
ADC DNL

MAX16047 toc16
INPUT VOLTAGE (DIGITAL CODE)
ADC DNL (LSB)
Typical Operating Characteristics (continued)
(VCC= 3.3V, TA= +25°C, unless otherwise noted.)
Pin Description
PIN
MAX16047MAX16049NAMEFUNCTION

1–81–8MON1–MON8
ADC Monitored Voltage Inputs. Set ADC input range for each MON_ through
configuration registers. Measured values are written to ADC registers and can be read
back through the I2C or JTAG interface.
9–12—MON9–MON12
ADC Monitored Voltage Inputs. Set ADC input range through configuration registers.
Measured values are written to ADC registers and can be read back through the I2C or
JTAG interface.13RESETConfigurable Reset Output14A0
Four-State SMBus Address. Address sampled upon POR. Connect A0 to ground, DBP,
SCL, or SDA to program an individual address when connecting multiple devices. See
the I2C/SMBus-Compatible Serial Interface section.15SCLSMBus Serial Clock Input16SDASMBus Serial Data Open-Drain Input/Output17TMSJTAG Test Mode Select18TDIJTAG Test Data In19TCKJTAG Test Clock20TDOJTAG Test Data Out
21, 4021, 40GNDGround. Connect all GND connections together.22GPIO623GPIO5
General-Purpose Input/Output. GPIO6 and GPIO5 are configurable as open-drain or
push-pull outputs, dedicated fault outputs, or for watchdog functionality. GPIO5 is
configurable as a watchdog input (WDI). GPIO6 is configurable as a watchdog output
(WDO). GPIO6 is also configurable for margining. Use the EEPROM to configure GPIO5
and GPIO6. See the General-Purpose Inputs/Outputs section.24EN
Analog Enable Input. Apply a voltage greater than the 0.525V (typ) threshold to enable
all outputs. The power-down sequence is triggered when EN falls below 0.5V (typ) and
all outputs are deasserted.
9–12,
25–36,
N.C.No Connection. Must be left unconnected.
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Pin Description (continued)
PIN
MAX16047MAX16049NAMEFUNCTION
37ABP
Internal Analog Voltage Bypass. Bypass ABP to GND with a 1µF ceramic capacitor.
ABP powers the internal circuitry of the MAX16047/MAX16049. Do not use ABP to
power any external circuitry.38VCCPower-Supply Input. Bypass VCC to GND with a 10µF ceramic capacitor.39DBP
Internal Digital Voltage Bypass. Bypass DBP to GND with a 1µF ceramic capacitor. DBP
supplies power to the EEPROM memory, to the internal logic circuitry, and to the
internal charge pumps when the programmable outputs are configured as charge
pumps. All push-pull outputs are referenced to DBP. Do not use DBP to power any
external circuitry.41GPIO1
General-Purpose Input/Output 1. Configure GPIO1 as a logic input, a return sense line
for closed-loop tracking, an open-drain/push-pull fault output, or an open-drain/push-
pull output port. Use the EEPROM to configure GPIO1. See the General-Purpose
Inputs/Outputs section.42GPIO2
General-Purpose Input/Output 2. GPIO2 is configurable as a logic input, a return sense
line for closed-loop tracking, an open-drain/push-pull fault output, or an open-drain/
push-pull output port. Use the EEPROM to configure GPIO2. See the General-Purpose
Inputs/Outputs section.43GPIO3
General-Purpose Input/Output 3. GPIO3 is configurable as a logic input, a return sense
line for closed-loop tracking, an open-drain/push-pull fault output, or an open-drain/
push-pull output port. Use the EEPROM to configure GPIO3. See the General-Purpose
Inputs/Outputs section.44GPIO4
General-Purpose Input/Output 4. GPIO4 is configurable as a logic input, a return sense
line for closed-loop tracking, an open-drain/push-pull fault output, or an open-drain/
push-pull output port. GPIO4 is also configurable as an active-low manual reset, MR.
Use the EEPROM to configure GPIO4. See the General-Purpose Inputs/Outputs
section.
45–5045–50EN_OUT1–
EN_OUT6
Output. EN_OUT1–EN_OUT6 are configurable with active-high/active-low logic and with
an open-drain or push-pull configuration. Program the EEPROM to configure
EN_OUT1–EN_OUT6 as a charge-pump output 5V greater than the monitored input
voltage (VMON_ + 5V). EN_OUT1–EN_OUT4 can also be used for closed-loop tracking.
51, 5251, 52EN_OUT7–
EN_OUT8
Output. Configure EN_OUT_ with active-low/active-high logic and with an open-drain or
push-pull configuration.
53–56—EN_OUT9–
EN_OUT12
Output. Configure EN_OUT_ with active-low/active-high logic and with an open-drain or
push-pull configuration.EPExposed Pad. Internally connected to GND. Connect to GND. EP also functions as a
heatsink to maximize thermal dissipation. Do not use as the main ground connection.
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Functional Diagram

VTH_EN
VOLTAGE
SCALING
AND MUX
10-BIT
ADC (SAR)
( ) MAX16049 ONLY.
ADC
REGISTERS
THRESHOLD
REGISTERS
DIGITAL COMPARATORS
RAM
REGISTERS
EEPROM
REGISTERS
LOGIC
SEQUENCER
CLOSED-LOOP
TRACKER
I2C SLAVE
INTERFACEJTAG INTERFACE
MON1–
MON12
(MON1–
MON8)
RESET
FAULT1
FAULT2
WATCHDOG
TIMER
WDI
GPIO CONTROL
WDO
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6INS1
INS2
INS3
INS4
EN_OUT1–
EN_OUT12
(EN_OUT1–
EN_OUT8)
EN_OUT1–
EN_OUT4SDASCLTMSTCKTDITDO
MARGIN
FAULTPU
GND
VCC
NONVOLATILE
FAULT EVENT
LOGGER
MAX16047
MAX16049
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Register Summary (All Registers 8-Bits Wide)
Note:
This data sheet uses a specific convention for referring to bits within a particular address location. As an example, r0Fh[3:0]
refers to bit 3 through 0 in register with address 15 decimal.
PAGEREGISTERDESCRIPTION

ADC Conversion Results
(Registers r00h to r17h)
Input ADC conversion results. ADC writes directly to these registers during normal
operation. ADC input ranges (MON1–MON12) are selected with registers r0Fh to r11h.
Failed Line Flags
(Registers r18h to r19h)
Voltage fault flag bits. Flags for each input signal when undervoltage or overvoltage
threshold is exceeded.Extended
GPIO Data
(Registers r1Ah to r1Bh)GPIO state data. Used to read back and control the state of each GPIO.
ADC Range Selections
(Registers r0Fh to r11h)ADC input voltage range. Selects the voltage range of the monitored inputs.
Fault Behavior
(Registers r47h to r4Ch)
Selects how the device should operate during faults. Options include latch-off or
autoretry after fault. The autoretry delay is selectable (r4Fh). Use registers r48h
through r4Ch to select fault conditions that trigger a critical fault event.
GPIO Configuration
(Registers r1Ch to r1Eh)
General-purpose input/output configuration registers. GPIOs are configurable as a
manual-reset input, a margin disable input, a watchdog timer input and output, logic
inputs/outputs, fault-dependent outputs, or as the feedback/pulldown inputs (INS_) for
closed-loop tracking.
Overvoltage and
Undervoltage Thresholds
(Registers r23h to r46h)
Input overvoltage and undervoltage thresholds. ADC conversion results are compared
to overvoltage and undervoltage threshold values stored here. MON_ voltages
exceeding threshold values trigger a fault event.
Programmable Output
Configuration
(Registers r1Fh to r22h)
Programmable output configurations. Selectable output configurations include: active-
low or active-high, open-drain or push-pull outputs. EN_OUT1–EN_OUT6 are
configurable as charge-pump outputs and EN_OUT1–EN_OUT4 can be configured for
closed-loop tracking.
RESET and Fault Outputs
(Registers r15h to r1Bh)
RESET, FAULT1, and FAULT2 output configuration. Programs the functionality of the
RESET, FAULT1, and FAULT2 outputs, as well as which inputs they depend on.
Sequencing-Mode
Configuration
(Registers r50h to r5Bh and
r5Eh to r63h)
Assign inputs and outputs for sequencing. Select sequence delays (20µs to 1.6s) with
registers r50h through r54h. Use register r54h to enable/disable the reverse sequence
bit for power-down operation.
Software Enable and Margin
(Register r4Dh)
Use register r4Dh to set the Software Enable bit, to select early warning thresholds
and undervoltage/overvoltage, to enable/disable margining, and to enable/disable the
watchdog for independent/dependent mode.
Default and
EEPROM
Watchdog Functionality
(Register r55h)Configure watchdog functionality for GPIO5 and GPIO6.
Fault Log Results
(Registers r00h to r0Eh)
ADC conversion results and failed-line flags at the time of a fault. These values are
recorded by the fault event logger at the time of a critical fault.EEPROM
User EEPROM (Registers
r9Ch to rFFh)User-available EEPROM
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Detailed Description
Getting Started

The MAX16047 is capable of managing up to twelve
system voltages simultaneously, and the MAX16049
can manage up to eight system voltages. After boot-
up, if EN is high and the Software Enablebit is set to
‘0,’ an internal multiplexer cycles through each input. At
each multiplexer stop, the 10-bit ADC converts the
monitored analog voltage to a digital result and stores
the result in a register. Each time the multiplexer finish-
es a conversion (8.3µs max), internal logic circuitry
compares the conversion results to the overvoltage and
undervoltage thresholds stored in memory. If a conver-
sion violates a programmed threshold, the conversion
can be configured to generate a fault. Logic outputs
can be programmed to depend on many combinations
of faults. Additionally, faults are programmable to trig-
ger the nonvolatile fault logger, which writes all fault
information automatically to the EEPROM and write-pro-
tects the data to prevent accidental erasure.
The MAX16047/MAX16049 contain both I2C/SMBus-
compatible and JTAG serial interfaces for accessing reg-
isters and EEPROM. Use only one interface at any given
time. For more information on how to access the internal
memory through these interfaces, see the I2C/SMBus-
Compatible Serial Interfaceand JTAG Serial Interface
sections. Registers are divided into three pages with
access controlled by special I2C and JTAG commands.
The factory-default values at POR (power-on reset) for
all RAM registers are ‘0’s. POR occurs when VCCreach-
es the undervoltage-lockout threshold (UVLO) of 2.85V
(max). At POR, the device begins a boot-up sequence.
During the boot-up sequence, all monitored inputs are
masked from initiating faults and EEPROM contents are
copied to the respective register locations. During boot-
up, the MAX16047/MAX16049 are not accessible
through the serial interface. The boot-up sequence can
take up to 1.5ms, after which the device is ready for
normal operation. RESETis low during boot-up and
asserts after boot-up for its programmed timeout period
once all monitored channels are within their respective
thresholds. During boot-up, the GPIOs and EN_OUTs
are high impedance.
Accessing the EEPROM

The MAX16047/MAX16049 memory is divided into
three separate pages. The default page, selected by
default at POR, contains configuration bits for all func-
tions of the part. The extended page contains the ADC
conversion results and GPIO input and output regis-
ters. Finally, the EEPROM page contains all stored con-
figuration information as well as saved fault data and
user-defined data. See the Register Maptable for more
information on the function of each register.
During the boot-up sequence, the contents of the
EEPROM (r0Fh to r7Dh) are copied into the default
page (r0Fh to r7Dh). Registers r00h to r0Eh of the EEP-
ROM page contain saved fault data.
The JTAG and I2C interfaces provide access to all
three pages. Each interface provides commands to
select and deselect a particular page:98h(I2C)/09h(JTAG)—Switches to the extended
page. Switch back to the default page with
99h(I2C)/0Ah(JTAG).9Ah(I2C)/0Bh(JTAG)—Switches to the EEPROM
page. Switch back to the default page with
9Bh(I2C)/0Ch(JTAG).
See the I2C/SMBus-Compatible Serial Interfaceor the
JTAG Serial Interfacesection.
Power

Apply 3V to 14V to VCC to power the MAX16047/
MAX16049. Bypass VCCto ground with a 10µF capacitor.
Two internal voltage regulators, ABP and DBP, supply
power to the analog and digital circuitry within the device.
Do not use ABP or DBP to power external circuitry.
ABP is a 2.85V (typ) voltage regulator that powers the
internal analog circuitry. Bypass the ABP output to GND
with a 1µF ceramic capacitor installed as close to the
device as possible.
DBP is an internal 2.7V (typ) voltage regulator. EEPROM
and digital circuitry are powered by DBP. All push-pull
outputs are referenced to DBP. DBP supplies the input
voltage to the internal charge pumps when the program-
mable outputs are configured as charge-pump outputs.
Bypass the DBP output to GND with a 1µF ceramic
capacitor installed as close as possible to the device.
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Enable

To initiate sequencing/tracking and enable monitoring,
the voltage at EN must be above 0.525V and the
Software Enablebit in r4Dh[0] must be set to ‘0.’ To
power down and disable monitoring, either pull EN
below 0.5V or set the Software Enablebit to ‘1.’ See
Table 1 for the software enable bit configurations.
Connect EN to ABP if not used.
If a fault condition occurs during the power-up cycle,
the EN_OUT_ outputs are powered down immediately,
independent of the state of EN. If operating in latch-on
fault mode, toggle EN or toggle the Software Enablebit
to clear the latch condition and restart the device once
the fault condition has been removed.
Table 1. EEPROM Software Enable Configurations
REGISTER/
EEPROM ADDRESSBIT RANGEDESCRIPTION

Software Enable bit
0 = Enabled. EN must also be high to begin sequencing
1 = Disabled (factory default)
Margin bit

1 = Margin functionality is enabled
0 = Margin disabled
Early Warning Selection bit

0 = Early warning thresholds are undervoltage thresholds
1 = Early warning thresholds are overvoltage thresholds
Watchdog Mode Selection bit

0 = Watchdog timer is in dependent mode
1 = Watchdog timer is in independent mode
4Dh
[7:4]Not used
Voltage Monitoring

The MAX16047/MAX16049 feature an internal 10-bit
ADC that monitors the MON_ voltage inputs. An internal
multiplexer cycles through each of the twelve inputs,
taking 100µs (typ) for a complete monitoring cycle.
Each acquisition takes approximately 8.3µs. At each
multiplexer stop, the 10-bit ADC converts the analog
input to a digital result and stores the result in a regis-
ter. ADC conversion results are stored in registers r00h
to r17h in the extended page. Use the I2C or JTAG seri-
al interface to read ADC conversion results. See the
I2C/SMBus-Compatible Serial Interfaceor the JTAG
Serial Interfacesection for more information on access-
ing the extended page.
The MAX16047 provides twelve inputs, MON1–MON12,
for voltage monitoring. The MAX16049 provides eight
inputs, MON1–MON8, for voltage monitoring. Each
input voltage range is programmable in registers r0Fh
to r11h (see Table 2). When MON_ configuration
registers are set to ‘11,’ MON_ voltages are not moni-
tored or converted, and the multiplexer does not stop at
these inputs, decreasing the total cycle time. These
inputs cannot be configured to trigger fault conditions.
The three programmable thresholds for each monitored
voltage include an overvoltage, an undervoltage, and
an early warning threshold that can be set in r4Dh[2] to
be either an undervoltage or overvoltage threshold. See
the Faultssection for more information on setting over-
voltage and undervoltage thresholds. All voltage
thresholds are 8 bits wide. The 8 MSBs of the 10-bit
ADC conversion result are compared to these overvolt-
age and undervoltage thresholds.
For any undervoltage or overvoltage condition to be
monitored and any faults detected, the MON_ input
must be assigned to a particular sequence order. See
the Sequencingsection for more details on assigning
MON_ inputs.
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Table 2. Input Monitor Ranges and Enables
REGISTER/
EEPROM
ADDRESS
BIT RANGEDESCRIPTION

[1:0]
MON1 Voltage Range Selection:

00 = From 0 to 5.6V in 5.46mV steps
01 = From 0 to 2.8V in 2.73mV steps
10 = From 0 to 1.4V in 1.36mV steps
11 = MON1 is not converted or monitored
[3:2]
MON2 Voltage Range Selection:

00 = From 0 to 5.6V in 5.46mV steps
01 = From 0 to 2.8V in 2.73mV steps
10 = From 0 to 1.4V in 1.36mV steps
11 = MON2 is not converted or monitored
[5:4]
MON3 Voltage Range Selection:

00 = From 0 to 5.6V in 5.46mV steps
01 = From 0 to 2.8V in 2.73mV steps
10 = From 0 to 1.4V in 1.36mV steps
11 = MON3 is not converted or monitored
0Fh
[7:6]
MON4 Voltage Range Selection:

00 = From 0 to 5.6V in 5.46mV steps
01 = From 0 to 2.8V in 2.73mV steps
10 = From 0 to 1.4V in 1.36mV steps
11 = MON4 is not converted or monitored
[1:0]
MON5 Voltage Range Selection:

00 = From 0 to 5.6V in 5.46mV steps
01 = From 0 to 2.8V in 2.73mV steps
10 = From 0 to 1.4V in 1.36mV steps
11 = MON5 is not converted or monitored
[3:2]
MON6 Voltage Range Selection:

00 = From 0 to 5.6V in 5.46mV steps
01 = From 0 to 2.8V in 2.73mV steps
10 = From 0 to 1.4V in 1.36mV steps
11 = MON6 is not converted or monitored
[5:4]
MON7 Voltage Range Selection:

00 = From 0 to 5.6V in 5.46mV steps
01 = From 0 to 2.8V in 2.73mV steps
10 = From 0 to 1.4V in 1.36mV steps
11 = MON7 is not converted or monitored
10h
[7:6]
MON8 Voltage Range Selection:

00 = From 0 to 5.6V in 5.46mV steps
01 = From 0 to 2.8V in 2.73mV steps
10 = From 0 to 1.4V in 1.36mV steps
11 = MON8 is not converted or monitored
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Table 2. Input Monitor Ranges and Enables (continued)
REGISTER/
EEPROM
ADDRESS
BIT RANGEDESCRIPTION

[1:0]
MON9 Voltage Range Selection*:

00 = From 0 to 5.6V in 5.46mV steps
01 = From 0 to 2.8V in 2.73mV steps
10 = From 0 to 1.4V in 1.36mV steps
11 = MON9 is not converted or monitored
[3:2]
MON10 Voltage Range Selection*:

00 = From 0 to 5.6V in 5.46mV steps
01 = From 0 to 2.8V in 2.73mV steps
10 = From 0 to 1.4V in 1.36mV steps
11 = MON10 is not converted or monitored
[5:4]
MON11 Voltage Range Selection*:

00 = From 0 to 5.6V in 5.46mV steps
01 = From 0 to 2.8V in 2.73mV steps
10 = From 0 to 1.4V in 1.36mV steps
11 = MON11 is not converted or monitored
11h
[7:6]
MON12 Voltage Range Selection*:

00 = From 0 to 5.6V in 5.46mV steps
01 = From 0 to 2.8V in 2.73mV steps
10 = From 0 to 1.4V in 1.36mV steps
11 = MON12 is not converted or monitored
*MAX16047 only
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers

The extended memory page contains the ADC conver-
sion result registers (see Table 3). These registers are
also used internally for fault threshold comparison.
Voltage-monitoring thresholds are compared with the 8
MSBs of the conversion results. Inputs that are not
enabled are not converted by the ADC; they contain the
last value acquired before that channel was disabled.
The ADC conversion result registers are reset to 00h at
boot-up. These registers are not reset when a reboot
command is executed.
Table 3. ADC Conversion Registers
EXTENDED PAGE
ADDRESSBIT RANGEDESCRIPTION

00h[7:0]MON1 ADC Conversion Result (MSB)
[7:6]MON1 ADC Conversion Result (LSB)01h[5:0]Reserved
02h[7:0]MON2 ADC Conversion Result (MSB)
[7:6]MON2 ADC Conversion Result (LSB)03h[5:0]Reserved
04h[7:0]MON3 ADC Conversion Result (MSB)
[7:6]MON3 ADC Conversion Result (LSB)05h[5:0]Reserved
06h[7:0]MON4 ADC Conversion Result (MSB)
[7:6]MON4 ADC Conversion Result (LSB)07h[5:0]Reserved
08h[7:0]MON5 ADC Conversion Result (MSB)
[7:6]MON5 ADC Conversion Result (LSB)09h[5:0]Reserved
0Ah[7:0]MON6 ADC Conversion Result (MSB)
[7:6]MON6 ADC Conversion Result (LSB)0Bh[5:0]Reserved
0Ch[7:0]MON7 ADC Conversion Result (MSB)
[7:6]MON7 ADC Conversion Result (LSB)0Dh[5:0]Reserved
0Eh[7:0]MON8 ADC Conversion Result (MSB)
[7:6]MON8 ADC Conversion Result (LSB)0Fh[5:0]Reserved
10h[7:0]MON9 ADC Conversion Result (MSB)*
[7:6]MON9 ADC Conversion Result (LSB)*11h[5:0]Reserved
12h[7:0]MON10 ADC Conversion Result (MSB)*
[7:6]MON10 ADC Conversion Result (LSB)*13h[5:0]Reserved
14h[7:0]MON11 ADC Conversion Result (MSB)*
[7:6]MON11 ADC Conversion Result (LSB)*15h[5:0]Reserved
16h[7:0]MON12 ADC Conversion Result (MSB)*
[7:6]MON12 ADC Conversion Result (LSB)*17h[5:0]Reserved
*MAX16047 only
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
General-Purpose Inputs/Outputs

GPIO1–GPIO6 are programmable general-purpose
inputs/outputs. GPIO1–GPIO6 are configurable as a
manual reset input, a margin disable input, a watchdog
timer input and output, logic inputs/outputs, fault-
dependent outputs, or as the feedback inputs (INS_)
for closed-loop tracking. When programmed as out-
puts, GPIOs are open drain or push-pull. See registers
r1Ch to r1Eh in Tables 4 and 5 for more detailed infor-
mation on configuring GPIO1–GPIO6.
Table 4. General-Purpose IO Configuration Registers
REGISTER/
EEPROM ADDRESSBIT RANGEDESCRIPTION

[2:0]GPIO1 Configuration Register
[5:3]GPIO2 Configuration Register1Ch
[7:6]GPIO3 Configuration Register (LSB)
[0]GPIO3 Configuration Register (MSB)
[3:1]GPIO4 Configuration Register
[6:4]GPIO5 Configuration Register1Dh
[7]GPIO6 Configuration Register (LSB)
[1:0]GPIO6 Configuration Register (MSB)1Eh[7:2]Reserved
Table 5. GPIO Mode Selection
CONFIGURATION
BITSGPIO1GPIO2GPIO3GPIO4GPIO5GPIO6

000INS1INS2INS3INS4—MARGIN input
001Push-pull logic
input/output
Push-pull logic
input/output
Push-pull logic
input/output
Push-pull logic
input/output
Push-pull logic
input/output
Push-pull logic
input/output
Open-drain
logic
input/output
Open-drain
logic
input/output
Open-drain
logic input/
output
Open-drain
logic
input/output
Open-drain
logic input/
output
Open-drain
logic input/
output
011Push-pull
Any_Fault output
Push-pull
Any_Fault output
Push-pull
Any_Fault output
Push-pull
Any_Fault output
Push-pull
FAULT1 output
Push-pull
FAULT2 output
100Open-drain
Any_Fault output
Open-drain
Any_Fault output
Open-drain
Any_Fault output
Open-drain
Any_Fault output
Open-drain
FAULT1 output
Open-drain
FAULT2 output
101Logic inputLogic inputLogic inputLogic inputLogic inputLogic input
110—————Open-drain
WDO output
111———MR inputWDI inputOpen-drain
FAULTPU output
Note:
The dash “—” represents a reserved GPIO configuration. Do not set any GPIO to these values.
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Voltage Tracking Sense (INS_) Inputs

GPIO1–GPIO4 are configurable as feedback sense
return inputs (INS_) for closed-loop tracking. Connect the
gate of an external n-channel MOSFET to each EN_OUT_
configured for closed-loop tracking. Connect INS_ inputs
to the source of the MOSFETs for tracking feedback.
Internal comparators monitor INS_ with respect to a
control tracking ramp voltage for power-up/power-
down and control each EN_OUT_ voltage. Under nor-
mal conditions each INS_ voltage tracks the ramp
voltage until the power-good voltage threshold has
been reached. The slew rate for the ramp voltage and
the INS_ to MON_ power-good threshold are program-
mable. See the Closed-Loop Trackingsection.
INS_ connections also act as 100Ωpulldowns for
closed-loop tracking channels or for other power sup-
plies, if INS_ are connected to the outputs of the sup-
plies. Set the appropriate bits in r4Eh[7:4] to enable
pulldown functionality. See Table 12.
General-Purpose Logic Inputs/Outputs

Configure GPIO1–GPIO6 to be used as general-pur-
pose inputs/outputs. Write values to GPIOs through
r1Ah when operating as outputs, and read values from
r1Bh when operating as inputs. Register r1Bh is read-
only. See Table 6 for more information on reading and
writing to the GPIOs as logic inputs/outputs. Both regis-
ters r1Ah and r1Bh are located in the extended page
and are therefore not loaded from EEPROM on boot-up.
Table 6. GPIO Data-In/Data-Out Data
EXTENDED PAGE
ADDRESSBIT RANGEDESCRIPTION

[0]
GPIO Logic Output Data

0 = GPIO1 is a logic-low output
1 = GPIO1 is a logic-high output
[1]0 = GPIO2 is a logic-low output
1 = GPIO2 is a logic-high output
[2]0 = GPIO3 is a logic-low output
1 = GPIO3 is a logic-high output
[3]0 = GPIO4 is a logic-low output
1 = GPIO4 is a logic-high output
[4]0 = GPIO5 is a logic-low output
1 = GPIO5 is a logic-high output
[5]0 = GPIO6 is a logic-low output
1 = GPIO6 is a logic-high output
1Ah
[7:6]Not used
[0]GPIO Logic Input Data
GPIO1 logic-input state
[1]GPIO2 logic-input state
[2]GPIO3 logic-input state
[3]GPIO4 logic-input state
[4]GPIO5 logic-input state
[5]GPIO6 logic-input state
1Bh
[7:6]Not used
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Any_Fault Outputs

GPIO1–GPIO4 are configurable as active-low push-pull
or open-drain fault-dependent outputs. These outputs
assert when any monitored input exceeds an overvolt-
age, undervoltage, or early warning threshold.
FAULT1and FAULT2
GPIO5 and GPIO6 are configurable as dedicated fault
outputs, FAULT1and FAULT2, respectively. Fault
outputs can assert on one or more overvoltage, under-
voltage, or early warning conditions for selected inputs.
FAULT1and FAULT2dependencies are set using reg-
isters r15h to r18h. See Table 7.
If a fault output depends on more than one MON_, the
fault output will assert if one or more MON_ exceeds a
programmed threshold voltage.
Table 7. FAULT1and FAULT2Output Configuration and Dependencies
REGISTER/
EEPROM
ADDRESS
BIT RANGEDESCRIPTION

[0]1 = FAULT1 is a digital output dependent on MON1
[1]1 = FAULT1 is a digital output dependent on MON2
[2]1 = FAULT1 is a digital output dependent on MON3
[3]1 = FAULT1 is a digital output dependent on MON4
[4]1 = FAULT1 is a digital output dependent on MON5
[5]1 = FAULT1 is a digital output dependent on MON6
[6]1 = FAULT1 is a digital output dependent on MON7
15h
[7]1 = FAULT1 is a digital output dependent on MON8
[0]1 = FAULT1 is a digital output dependent on MON9*
[1]1 = FAULT1 is a digital output dependent on MON10*
[2]1 = FAULT1 is a digital output dependent on MON11*
[3]1 = FAULT1 is a digital output dependent on MON12*
[4]1 = FAULT1 is a digital output that depends on the overvoltage thresholds at the input
selected by r15h and r16h[3:0]
[5]1 = FAULT1 is a digital output that depends on the undervoltage thresholds at the
input selected by r15h and r16h[3:0]
[6]1 = FAULT1 is a digital output that depends on the early warning thresholds at the
input selected by r15h and r16h[3:0]
16h
[7]0 = FAULT1 is an active-low digital output
1 = FAULT1 is an active-high digital output
[0]1 = FAULT2 is a digital output dependent on MON1
[1]1 = FAULT2 is a digital output dependent on MON2
[2]1 = FAULT2 is a digital output dependent on MON3
[3]1 = FAULT2 is a digital output dependent on MON4
[4]1 = FAULT2 is a digital output dependent on MON5
[5]1 = FAULT2 is a digital output dependent on MON6
[6]1 = FAULT2 is a digital output dependent on MON7
17h
[7]1 = FAULT2 is a digital output dependent on MON8
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Fault-On Power-Up (FAULTPU)

GPIO6 indicates a fault during power-up or power-
down when configured as a “fault-on power-up” output.
Under these conditions, all EN_OUT_ voltages are
pulled low and fault data is saved to nonvolatile
EEPROM. See the Faultssection.
MARGIN
GPIO6 is configurable as an active-low MARGINinput.
Drive MARGINlow before varying system voltages above
or below the thresholds to avoid signaling an error. Drive
MARGINhigh for normal operation.
When MARGINis pulled low or r4Dh[1] is a ‘1,’ the mar-
gin function is enabled. FAULT1, FAULT2, Any_Fault,
and RESETare latched in their current state. Threshold
violations will be ignored, and faults will not be logged.
Manual Reset (MR)

GPIO4 is configurable to act as an active-low manual
reset input, MR. Drive MRlow to assert RESET. RESET
remains low for the selected reset timeout period aftertransitions from low to high. See the RESETsection
for more information on selecting a reset timeout period.
Watchdog Input (WDI) and Output (WDO)

Set r1Eh[1:0] and r1Dh[7] to ‘110’ to configure GPIO6 as
WDO. Set r1Dh[6:4] to ‘111’ to configure GPIO5 as WDI.
WDO is an open-drain active-low output. See the
Watchdog Timersection for more information about the
operation of the watchdog timer.
Programmable Outputs
(EN_OUT1–EN_OUT12)

The MAX16047 includes twelve programmable outputs,
and the MAX16049 includes eight programmable out-
puts. These outputs are capable of connecting to either
the enable (EN) inputs of a DC-DC or LDO power supply
or to the gates of series-pass MOSFETs for closed-loop
tracking mode, or for charge-pump mode. Selectable
output configurations include: active-low or active-high,
open-drain or push-pull. EN_OUT1–EN_OUT4 are also
configurable for closed-loop tracking, and EN_OUT1–
EN_OUT6 can act as charge-pump outputs with no
closed-loop tracking. Use the registers r1Fh to r22h to
configure outputs. See Table8 for detailed information
on configuring EN_OUT1–EN_OUT12.
Table 7. FAULT1and FAULT2Output Configuration and Dependencies (continued)
REGISTER/
EEPROM
ADDRESS
BIT RANGEDESCRIPTION

[0]1 = FAULT2 is a digital output dependent on MON9*
[1]1 = FAULT2 is a digital output dependent on MON10*
[2]1 = FAULT2 is a digital output dependent on MON11*
[3]1 = FAULT2 is a digital output dependent on MON12*
[4]1 = FAULT2 is a digital output that depends on the overvoltage thresholds at the input
selected by r17h and r18h[3:0]
[5]1 = FAULT2 is a digital output that depends on the undervoltage thresholds at the
input selected by r17h and 18h[3:0]
[6]1 = FAULT2 is a digital output that depends on the early warning thresholds at the
input selected by r17h and r18h[3:0]
18h
[7]0 = FAULT2 is an active-low digital output
1 = FAULT2 is an active-high digital output
*MAX16047 only
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Table 8. EN_OUT1–EN_OUT12 Configuration
REGISTER/
EEPROM
ADDRESS
BIT RANGEDESCRIPTION

[2:0]
EN_OUT1 Configuration:

000 = EN_OUT1 is an open-drain active-low output
001 = EN_OUT1 is an open-drain active-high output
010 = EN_OUT1 is a push-pull active-low output
011 = EN_OUT1 is a push-pull active-high output
100 = EN_OUT1 is used in closed-loop tracking
101 = EN_OUT1 is configured with a charge-pump output (MON1 + 5V) capable of driving an
external n-channel MOSFET
110 = Reserved
111 = Reserved
[5:3]
EN_OUT2 Configuration:

000 = EN_OUT2 is an open-drain active-low output
001 = EN_OUT2 is an open-drain active-high output
010 = EN_OUT2 is a push-pull active-low output
011 = EN_OUT2 is a push-pull active-high output
100 = EN_OUT2 is used in closed-loop tracking
101 = EN_OUT2 is configured with a charge-pump output (MON2 + 5V) capable of driving an
external n-channel MOSFET
110 = Reserved
111 = Reserved
1Fh
[7:6]
EN_OUT3 Configuration (LSBs):

000 = EN_OUT3 is an open-drain active-low output
001 = EN_OUT3 is an open-drain active-high output
010 = EN_OUT3 is a push-pull active-low output
011 = EN_OUT3 is a push-pull active-high output
100 = EN_OUT3 is used in closed-loop tracking
101 = EN_OUT3 is configured with a charge-pump output (MON3 + 5V) capable of driving an
external n-channel MOSFET
110 = Reserved
111 = Reserved
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Table 8. EN_OUT1–EN_OUT12 Configuration (continued)
REGISTER/
EEPROM
ADDRESS
BIT RANGEDESCRIPTION

[0]EN_OUT3 Configuration (MSB)—see r1Fh[7:6]
[3:1]
EN_OUT4 Configuration:

000 = EN_OUT4 is an open-drain active-low output
001 = EN_OUT4 is an open-drain active-high output
010 = EN_OUT4 is a push-pull active-low output
011 = EN_OUT4 is a push-pull active-high output
100 = EN_OUT4 is used in closed-loop tracking
101 = EN_OUT4 is configured with a charge-pump output (MON4 + 5V) capable of driving an
external n-channel MOSFET
110 = Reserved
111 = Reserved
[6:4]
EN_OUT5 Configuration:

000 = EN_OUT5 is an open-drain active-low output
001 = EN_OUT5 is an open-drain active-high output
010 = EN_OUT5 is a push-pull active low output
011 = EN_OUT5 is a push-pull active-high output
100 = Reserved. EN_OUT5 is not usable for closed-loop tracking.
101 = EN_OUT5 is configured with a charge-pump output (MON5 + 5V) capable of driving an
external n-channel MOSFET
110 = Reserved
111 = Reserved
20h
[7]EN_OUT6 Configuration (LSB)—see r21h[1:0]
[1:0]
EN_OUT6 Configuration (MSBs):

000 = EN_OUT6 is an open-drain active-low output
001 = EN_OUT6 is an open-drain active-high output
010 = EN_OUT6 is a push-pull active-low output
011 = EN_OUT6 is a push-pull active-high output
100 = Reserved. EN_OUT6 is not useable for closed-loop tracking.
101 = EN_OUT6 is configured with a charge-pump output (MON6 + 5V) capable of driving an
external n-channel MOSFET
110 = Reserved
111 = Reserved
[3:2]
EN_OUT7 Configuration:

00 = EN_OUT7 is an open-drain active-low output
01 = EN_OUT7 is an open-drain active-high output
10 = EN_OUT7 is a push-pull active-low output
11 = EN_OUT7 is a push-pull active-high output
[5:4]
EN_OUT8 Configuration:

00 = EN_OUT8 is an open-drain active-low output
01 = EN_OUT8 is an open-drain active-high output
10 = EN_OUT8 is a push-pull active-low output
11 = EN_OUT8 is a push-pull active-high output
21h
[7:6]
EN_OUT9 Configuration*:

00 = EN_OUT9 is an open-drain active-low output
01 = EN_OUT9 is an open-drain active-high output
10 = EN_OUT9 is a push-pull active-low output
11 = EN_OUT9 is a push-pull active-high output
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Table 8. EN_OUT1–EN_OUT12 Configuration (continued)
REGISTER/
EEPROM
ADDRESS
BIT RANGEDESCRIPTION

[1:0]
EN_OUT10 Configuration*:

00 = EN_OUT10 is an open-drain active-low output
01 = EN_OUT10 is an open-drain active-high output
10 = EN_OUT10 is a push-pull active-low output
11 = EN_OUT10 is a push-pull active-high output
[3:2]
EN_OUT11 Configuration*:

00 = EN_OUT11 is an open-drain active-low output
01 = EN_OUT11 is an open-drain active-high output
10 = EN_OUT11 is a push-pull active-low output
11 = EN_OUT11 is a push-pull active-high output
[5:4]
EN_OUT12 Configuration*:

00 = EN_OUT12 is an open-drain active-low output
01 = EN_OUT12 is an open-drain active high output
10 = EN_OUT12 is a push-pull active-low output
11 = EN_OUT12 is a push-pull active-high output
22h
[7:6]Reserved
*MAX16047 only
Charge-Pump Configuration

EN_OUT1–EN_OUT6 can act as high-voltage charge-
pump outputs to drive up to six external n-channel
MOSFETs. During sequencing, an EN_OUT_ output
configured this way drives 6µA until the voltage reach-
es 5V above the corresponding MON_ to fully enhance
the external n-channel MOSFET. For example,
EN_OUT2 will rise to 5V above MON2. See the
Sequencing section for more detailed information on
power-supply sequencing.
Closed-Loop Tracking Operation

EN_OUT1–EN_OUT4 can operate in closed-loop track-
ing mode. When configured for closed-loop tracking,
EN_OUT1–EN_OUT4 are capable of driving the gates
of up to four external n-channel MOSFETs. For closed-
loop tracking, configure GPIO1–GPIO4 as return-sense
line inputs (INS_) to be used in conjunction with
EN_OUT1–EN_OUT4 and MON1–MON4. See the
Closed-Loop Tracking section.
Open-Drain Output Configuration

Connect an external pullup resistor from the output to
an external voltage up to 6V (abs max, EN_OUT7–
EN_OUT12) or 12V (abs max, EN_OUT1–EN_OUT6)
when configured as an open-drain output. Choose the
pullup resistor depending on the number of devices
connected to the open-drain output and the allowable
current consumption. The open-drain output configura-
tion allows wire-ORed connection.
Push-Pull Output Configuration

The MAX16047/MAX16049s’ programmable outputs
sink 2mA and source 100µA when configured as push-
pull outputs.
EN_OUT_ State During Power-Up

When VCCis ramped from 0V to the operating supply
voltage, the EN_OUT_ output is high impedance until
VCCis approximately 2.4V and then EN_OUT_ will be in
its configured deasserted state. See Figures 3 and 4.
RESETis configured as an active-low open-drain out-
put pulled up to VCCthrough a 10kΩresistor for
Figures 3 and 4.
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers

MAX16047 fig03
20ms/div
VCC
2V/div
EN_OUT_
2V/div
RESET
2V/div
Figure 3. RESETand EN_OUT_ During Power-Up, EN_OUT_ Is
in Open-Drain Active-Low Configuration
MAX16047 fig04
10ms/div
VCC
2V/div
EN_OUT_
2V/div
RESET
2V/divHIGH-Z
ASSERTED
LOW
UVLO
Figure 4. RESETand EN_OUT_ During Power-Up, EN_OUT_ Is
in Push-Pull Active-High Configuration
Sequencing

Each EN_OUT_ has one or more associated MON_
inputs, facilitating the voltage monitoring of multiple
power supplies. To sequence a system of power sup-
plies safely, the output voltage of a power supply must
be good before the next power supply may turn on.
Connect EN_OUT_ outputs to the enable input of an
external power supply and connect MON_ inputs to the
output of the power supply for voltage monitoring. More
than one MON_ may be used if the power supply has
multiple outputs.
Sequence Order

The MAX16047/MAX16049 utilize a system of ordered
slots to sequence multiple power supplies. To deter-
mine the sequence order, assign each EN_OUT_ to a
slot ranging from Slot 0 to Slot 11. EN_OUT_(s)
assigned to Slot 0 are turned on first, followed by out-
puts assigned to Slot 1, and so on through Slot 11.
Multiple EN_OUT_s assigned to the same slot turn on at
the same time.
Each slot has a built-in configurable sequence delay
(registers r50h to r54h) ranging from 20µs to 1.6s. During
a reverse sequence, slots are turned off in reverse order
starting from Slot 11. The MAX16047/MAX16049 may be
configured to power-down in simultaneous mode or in
reverse sequence mode as set in r54h[4]. See Tables 9,
10, and 11 for the EN_OUT_ slot assignment bits, and
Tables 12 and 13 for the sequence delays.
Monitoring Inputs While Sequencing

An enabled MON_ input may be assigned to a slot rang-
ing from Slot 1 to Slot 12. Monitoring inputs are always
checked at the beginning of a slot. The inputs are given
the power-up fault delay within which they must satisfy
the programmed undervoltage limit; otherwise a fault
condition will occur. The fault occurs regardless of the
critical fault enable bits. This undervoltage limit cannot
be disabled during power-up and power-down.
EN_OUT_s configured for open-drain, push-pull, or
charge-pump operation are always asserted at the end
of a slot, following the sequence delay. See Tables 9,
10, and 11 for the MON_ slot assignment bits.
Slot 0 does not monitor any MON_ input. Instead, Slot 0
waits for the Software Enablebit r4Dh[0] to be a logic ‘0’
and for the voltage on EN to rise above 0.525V before
asserting any assigned outputs. Outputs assigned to
Slot 0 are asserted before the Slot 0 sequence delay.
Generally, Slot 0 controls the enable inputs of power
supplies that are first in the sequence.
Similarly, Slot 12 does not control any EN_OUT_ out-
puts. Rather, Slot 12 monitors assigned MON_ inputs
and then enters the power-on state. Generally, Slot 12
monitors the last power supplies in the sequence. The
power-up sequence is complete when any MON_ inputs
assigned to Slot 12 exceed their undervoltage thresh-
olds and the sequence delay is expired. If no MON_
inputs are assigned to Slot 12, the power-up sequence
is complete after the slot sequence delay is expired.
The output rail(s) of a power supply should be moni-
tored by one or more MON_ inputs placed in the suc-
ceeding slot, ensuring that the output of the supply is
not checked until it has first been turned on. For exam-
ple, if a power supply uses EN_OUT1 located in Slot 3
and has two monitoring inputs, MON1 and MON2, they
must both be assigned to Slot 4. In this example,
EN_OUT1 turns on at the end of Slot 3. At the start of
Slot 4, MON1 and MON2 must exceed the undervolt-
age threshold before the programmed power-up fault
delay; otherwise a fault triggers.
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Table 9. MON_ and EN_OUT_ Slot Assignment Registers
REGISTER/
EEPROM
ADDRESS
BIT RANGEDESCRIPTION

[3:0]MON1 Slot Assignment Register56h[7:4]MON2 Slot Assignment Register
[3:0]MON3 Slot Assignment Register57h[7:4]MON4 Slot Assignment Register
[3:0]MON5 Slot Assignment Register58h[7:4]MON6 Slot Assignment Register
[3:0]MON7 Slot Assignment Register59h[7:4]MON8 Slot Assignment Register
[3:0]MON9 Slot Assignment Register*5Ah[7:4]MON10 Slot Assignment Register*
[3:0]MON11 Slot Assignment Register*5Bh[7:4]MON12 Slot Assignment Register*
[3:0]EN_OUT1 Slot Assignment Register5Eh[7:4]EN_OUT2 Slot Assignment Register
[3:0]EN_OUT3 Slot Assignment Register5Fh[7:4]EN_OUT4 Slot Assignment Register
[3:0]EN_OUT5 Slot Assignment Register60h[7:4]EN_OUT6 Slot Assignment Register
[3:0]EN_OUT7 Slot Assignment Register61h[7:4]EN_OUT8 Slot Assignment Register
[3:0]EN_OUT9 Slot Assignment Register*62h[7:4]EN_OUT10 Slot Assignment Register*
[3:0]EN_OUT11 Slot Assignment Register*63h[7:4]EN_OUT12 Slot Assignment Register *
*MAX16047 only
RESETDeassertion
After any MON_ inputs assigned to Slot 12 exceed their
undervoltage thresholds, the reset timeout begins. When
the reset timeout completes, RESETdeasserts. The reset
timeout period is set in r19h[6:4]. See Table 21.
Power-Down

Power-down starts when EN is pulled low or the
Software Enablebit is set to ‘1.’ RESETasserts as soon
as power-down begins regardless of the reset output
dependencies. Power down EN_OUT_s simultaneously
or in reverse sequence mode by setting the Reverse
Sequence bit (r54h[4]) appropriately. In reverse
sequence mode (r54h[4] set to ‘1’), the EN_OUT_s
assigned to Slot 11 deassert, the MAX16047/MAX16049
wait for the Slot 11 sequence delay and then proceed
to Slot 10, and so on until the EN_OUT_s assigned to
Slot 0 turn off. When simultaneous power-down is
selected (r54h[4] set to ‘0’), all EN_OUT_s turn off at the
same time.
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Table 10. MON_ Slot Assignment
CONFIGURATION BITSDESCRIPTION

0000MON_ is not assigned to a slot
0001MON_ is assigned to Slot 1
0010MON_ is assigned to Slot 2
0011MON_ is assigned to Slot 3
0100MON_ is assigned to Slot 4
0101MON_ is assigned to Slot 5
0110MON_ is assigned to Slot 6
0111MON_ is assigned to Slot 7
1000MON_ is assigned to Slot 8
1001MON_ is assigned to Slot 9
1010MON_ is assigned to Slot 10
1011MON_ is assigned to Slot 11
1100MON_ is assigned to Slot 12
1101Not used
1110Not used
1111Not used
Table 11. EN_OUT_ Slot Assignment
CONFIGURATION BITSDESCRIPTION

0000EN_OUT_ is not assigned to a slot
0001EN_OUT_ is assigned to Slot 0
0010EN_OUT_ is assigned to Slot 1
0011EN_OUT_ is assigned to Slot 2
0100EN_OUT_ is assigned to Slot 3
0101EN_OUT_ is assigned to Slot 4
0110EN_OUT_ is assigned to Slot 5
0111EN_OUT_ is assigned to Slot 6
1000EN_OUT_ is assigned to Slot 7
1001EN_OUT_ is assigned to Slot 8
1010EN_OUT_ is assigned to Slot 9
1011EN_OUT_ is assigned to Slot 10
1100EN_OUT_ is assigned to Slot 11
1101Not used
1110Not used
1111Not used
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Table 12. Sequence Delays and Fault Recovery
REGISTER/
EEPROM
ADDRESS
BIT RANGEDESCRIPTION

[1:0]
Power-Up Fault Timeout

00 = 25ms
01 = 50ms
10 = 100ms
11 = 200ms
[3:2]
Power-Down Fault Timeout

00 = 25ms
01 = 50ms
10 = 100ms
11 = 200ms
[4]
INS1 Pulldown Resistor Enable

0 = Pulldown resistor for INS1 is disabled
1 = Pulldown resistor for INS1 is enabled
[5]
INS2 Pulldown Resistor Enable

0 = Pulldown resistor for INS2 is disabled
1 = Pulldown resistor for INS2 is enabled
[6]
INS3 Pulldown Resistor Enable

0 = Pulldown resistor for INS3 is disabled
1 = Pulldown resistor for INS3 is enabled
4Eh
[7]
INS4 Pulldown Resistor Enable

0 = Pulldown resistor for INS4 is disabled
1 = Pulldown resistor for INS4 is enabled
[2:0]
Autoretry Timeout

000 = 20µs
001 = 12.5ms
010 = 25ms
011 = 50ms
100 = 100ms
101 = 200ms
110 = 400ms
111 = 1.6s
[3]
Fault Recovery Mode

0 = Autoretry procedure is performed following a fault event
1 = Latch-off on fault
[5:4]
Slew Rate

00 = 800V/s
01 = 400V/s
10 = 200V/s
11 = 100V/s
4Fh
[7:6]
Fault Deglitch

00 = 2 conversions
01 = 4 conversions
10 = 8 conversions
11 = 16 conversions
MAX16047/MAX16049
12-Channel/8-Channel EEPROM-Programmable
System Managers with Nonvolatile Fault Registers
Table 12. Sequence Delays and Fault Recovery (continued)
REGISTER/
EEPROM
ADDRESS
BIT RANGEDESCRIPTION

[2:0]Slot 0 Sequence Delay
[5:3]Slot 1 Sequence Delay50h
[7:6]Slot 2 Sequence Delay (LSBs)
[0]Slot 2 Sequence Delay (MSB)—see r50h[7:6]
[3:1]Slot 3 Sequence Delay
[6:4]Slot 4 Sequence Delay51h
[7]Slot 5 Sequence Delay (LSB)—see r52h[1:0]
[1:0]Slot 5 Sequence Delay
[4:2]Slot 6 Sequence Delay52h
[7:5]Slot 7 Sequence Delay
[2:0]Slot 8 Sequence Delay
[5:3]Slot 9 Sequence Delay53h
[7:6]Slot 10 Sequence Delay (LSBs)
[0]Slot 10 Sequence Delay (MSB)—see r53h[7:6]
[3:1]Slot 11 Sequence Delay
[4]
Reverse Sequence

0 = Power down all EN_OUT_s at the same time (simultaneously)
1 = Controlled power-down will be reverse of power-up sequence
54h
[7:5]Not used
Table 13. Slot Sequence Delay Selection
CONFIGURATION BITSSLOT SEQUENCE DELAY

00020µs
00112.5ms
01025ms
01150ms
100100ms
101200ms
110400ms
1111.6s
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