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MC10125ONN/a131avaiQuad MECL to TTL Transistor


MC10125 ,Quad MECL to TTL TransistorELECTRICAL CHARACTERISTICS (continued)TEST VOLTAGE VALUES (Volts)@ Test Temperature V V V V V VIHma ..
MC10125 ,Quad MECL to TTL Transistor**SEMICONDUCTOR TECHNICAL DATA* * ** **The MC10125 is a quad translator for interfacing data and c ..
MC10125FN ,Quad MECL to TTL TransistorLOGIC DIAGRAMA 3 14 DIN IN243 A D4 13OUT OUTB C6 5 12OUT OUT57B 6 11 CIN IN1012B C7 10IN IN11V V8 9 ..
MC10125L ,Quad MECL to TTL TransistorLOGIC DIAGRAMA 3 14 DIN IN243 A D4 13OUT OUTB C6 5 12OUT OUT57B 6 11 CIN IN1012B C7 10IN IN11V V8 9 ..
MC10125L. ,Quad MECL to TTL TransistorELECTRICAL CHARACTERISTICSTest LimitsPi Pin–30°C +25°C +85°CUnder UnderCharacteristic Symbol Test U ..
MC10125P ,Quad MECL to TTL TransistorLOGIC DIAGRAMA 3 14 DIN IN243 A D4 13OUT OUTB C6 5 12OUT OUT57B 6 11 CIN IN1012B C7 10IN IN11V V8 9 ..
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MC33348D-5 ,LITHIUM BATTERY PROTECTION CIRCUIT FOR ONE CELL SMART BATTERY PACKSfeatures consist of internally trimmed chargeONE CELLand discharge voltage limits, discharge curren ..
MC33349N-3 R1 ,Lithium Battery Protection Circuit for One Cell Battery PacksELECTRICAL CHARACTERISTICS (C = 0.01 μF, T = 25°C, for min/max values T is the operating junction t ..


MC10125
Quad MECL to TTL Transistor
SEMICONDUCTOR TECHNICAL DATA -
The MC10125 is a quad translator for interfacing data and control signals
between the MECL section and saturated logic sections of digital systems. The
MC10125 incorporates differential inputs and Schottky TTL “totem pole”
outputs. Differential inputs allow for use as an inverting/ non–inverting translator
or as a differential line receiver. The VBB reference voltage is available on pin 1
for use in single–ended input biasing. The outputs of the MC10125 go to a low
logic level whenever the inputs are left floating.
Power supply requirements are ground, +5.0 Volts and –5.2 Volts.
Propagation delay of the MC10125 is typically 4.5 ns. The MC10125 has fanout
of 10 TTL loads. The dc levels are MECL 10,000 in and Schottky TTL, or TTL
out. This device has an input common mode noise rejection of ± 1.0 Volt.
An advantage of this device is that MECL level information can be received,
via balanced twisted pair lines, in the TTL equipment. This isolates the MECL
logic from the noisy TTL environment. This device is useful in computers,
instrumentation, peripheral controllers, test equipment and digital
communications systems. = 380 mW typ/pkg (No Load)
tpd = 4.5 ns typ (50% to + 1.5 Vdc out)
tr, tf = 2.5 ns typ (1.0 V to 2.0 V)
LOGIC DIAGRAM
371115
VBB*
*VBB to be used to supply bias to the MC10125 only and bypassed (when used)
with 0.01 μF to 0.1 μF capacitor to ground (0 V). VBB can source < 1.0 mA.
When the input pin with the bubble goes positive, the output goes negative.
Gnd = PIN 16
VCC (+5.0Vdc)= PIN 9
VEE (–5.2Vdc)= PIN 8
DIP
PIN ASSIGNMENT

VBB
AIN
AIN
AOUT
BOUT
BIN
BIN
VEE
GND
DIN
DIN
DOUT
COUT
CIN
CIN
VCC
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).
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