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Partno	Mfg	Dc	Qty	Available	Descript
MC10188L	MOT	N/a	8375	avai	Hex Buffer With Enable

MC10188L ,Hex Buffer With EnableLOGIC DIAGRAMFN SUFFIXPLCCXOUT9 CASE 775–022Y536DIP47PIN ASSIGNMENT1310V 1 16 VCC1 CC22 15 FA14 OUT ..
MC10188P ,Hex Buffer With EnableLOGIC DIAGRAMFN SUFFIXPLCCXOUT9 CASE 775–022Y536DIP47PIN ASSIGNMENT1310V 1 16 VCC1 CC22 15 FA14 OUT ..
MC10189FN ,Hex Inverter With EnableELECTRICAL CHARACTERISTICSTest LimitsPin Pi–30°C +25°C +85°CUnder UnderCharacteristic Symbol Test U ..
MC10189FNR2 ,Hex Inverter With EnableLOGIC DIAGRAMCASE 648–08XFN SUFFIX9OUTPLCC2YCASE 775–025364DIP7PIN ASSIGNMENT1310V 1 16 VCC1 CC2A 2 ..
MC10189L ,Hex Inverter With Enable**SEMICONDUCTOR TECHNICAL DATA ** * *The MC10189 provides a high-speed Hex Inverter with a commonEn ..
MC10189P ,Hex Inverter With EnableELECTRICAL CHARACTERISTICSTest LimitsPin Pi–30°C +25°C +85°CUnder UnderCharacteristic Symbol Test U ..
MC3361N , LOW POWER NARROW BAND FM IF
MC3362 ,LOW-POWER DUAL CONVERSION FM RECEIVEROrder this document by MC3362/D **. . . includes dual FM conversion with oscillators, mixers, quad ..
MC3362DW ,LOW-POWER DUAL CONVERSION FM RECEIVEROrder this document by MC3362/D **. . . includes dual FM conversion with oscillators, mixers, quad ..
MC3362P ,LOW-POWER DUAL CONVERSION FM RECEIVEROrder this document by MC3362/D **. . . includes dual FM conversion with oscillators, mixers, quad ..
MC3363DW ,LOW POWER DUAL CONVERSION FM RECEIVERBlock Diagram1 281st Mixer Input 1st Mixer Input2 27Base Varicap ControlEmitter 3 26 1st LO TankCol ..
MC33661 ,LIN Enhanced Physical Interfacefunctional description of each terminal can be found in the System/Application Information section ..

MC10188L
Hex Buffer With Enable
SEMICONDUCTOR TECHNICAL DATA -
The MC10188 is a high–speed hex buffer with a common Enable input.
When Enable is in the high state, all outputs are in the low state. When Enable
is in the low state, the outputs take the same state as the inputs.
Power Dissipation= 180 mW typ/pkg (No Load)
Propagation Delay= 2.0 ns typ (B – Q)
2.5 ns typ (A – Q)
LOGIC DIAGRAM
VCC1= PIN 1
VCC2= PIN 16
VEE = PIN 8 15 14 13 4 3 29
TRUTH TABLE
DIP
PIN ASSIGNMENT
VCC1
AOUT
BOUT
COUT
AIN
BIN
CIN
VEE
VCC2
FOUT
EOUT
DOUT
FIN
EIN
DIN
COMMON
Pin assignment is for Dual–in–Line Package.
For PLCC pin assignment, see the Pin Conversion
Tables on page 6–11 of the Motorola MECL Data
Book (DL122/D).

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